参数资料
型号: AT90USB1287-MUR
厂商: Atmel
文件页数: 22/106页
文件大小: 0K
描述: MCU AVR 128K FLASH 16MHZ 64QFN
产品培训模块: MCU Product Line Introduction
megaAVR Introduction
标准包装: 1,000
系列: AVR® 90USB
核心处理器: AVR
芯体尺寸: 8-位
速度: 16MHz
连通性: EBI/EMI,I²C,SPI,UART/USART,USB,USB OTG
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 48
程序存储器容量: 128KB(128K x 8)
程序存储器类型: 闪存
EEPROM 大小: 4K x 8
RAM 容量: 8K x 8
电压 - 电源 (Vcc/Vdd): 2.7 V ~ 5.5 V
数据转换器: A/D 8x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 64-VFQFN 裸露焊盘
包装: 带卷 (TR)
22
7593L–AVR–09/12
AT90USB64/128
An optional external data SRAM can be used with the Atmel AT90USB64/128. This SRAM will
occupy an area in the remaining address locations in the 64K address space. This area starts at
the address following the internal SRAM. The Register file, I/O, Extended I/O and Internal SRAM
occupies the lowest 4,352/8,448 bytes, so when using 64KB (65,536 bytes) of External Memory,
61,184/57,088 Bytes of External Memory are available. See “External memory interface” on
page 31 for details on how to take advantage of the external memory map.
When the addresses accessing the SRAM memory space exceeds the internal data memory
locations, the external data SRAM is accessed using the same instructions as for the internal
data memory access. When the internal data memories are accessed, the read and write strobe
pins (PE0 and PE1) are inactive during the whole access cycle. External SRAM operation is
enabled by setting the SRE bit in the XMCRA Register.
Accessing external SRAM takes one additional clock cycle per byte compared to access of the
internal SRAM. This means that the commands LD, ST, LDS, STS, LDD, STD, PUSH, and POP
take one additional clock cycle. If the Stack is placed in external SRAM, interrupts, subroutine
calls and returns take three clock cycles extra because the three-byte program counter is
pushed and popped, and external memory access does not take advantage of the internal pipe-
line memory access. When external SRAM interface is used with wait-state, one-byte external
access takes two, three, or four additional clock cycles for one, two, and three wait-states
respectively. Interrupts, subroutine calls and returns will need five, seven, or nine clock cycles
more than specified in the Instruction set Manual for one, two, and three wait-states.
The five different addressing modes for the data memory cover: Direct, Indirect with Displace-
ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register file,
registers R26 to R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base address given
by the Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-incre-
ment, the address registers X, Y, and Z are decremented or incremented.
The 32 general purpose working registers, 64 I/O registers, and the 8,192 bytes of internal data
SRAM in the AT90USB64/128 are all accessible through all these addressing modes. The Reg-
相关PDF资料
PDF描述
AT90USB1287-AUR MCU AVR 128K FLASH 16MHZ 64TQFP
VE-BTF-IX CONVERTER MOD DC/DC 72V 75W
VI-B3X-IX-F2 CONVERTER MOD DC/DC 5.2V 75W
VE-BTF-IW CONVERTER MOD DC/DC 72V 100W
VI-B3X-IW-F4 CONVERTER MOD DC/DC 5.2V 100W
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