参数资料
型号: AT91SAM7S32B-MU-999
厂商: Atmel
文件页数: 39/165页
文件大小: 0K
描述: IC MCU ARM7 32KB FLASH 48-VQFN
产品培训模块: MCU Product Line Introduction
标准包装: 3,500
系列: SAM7S
核心处理器: ARM7
芯体尺寸: 16/32-位
速度: 55MHz
连通性: I²C,SPI,SSC,UART/USART
外围设备: 欠压检测/复位,DMA,POR,PWM,WDT
输入/输出数: 21
程序存储器容量: 32KB(32K x 8)
程序存储器类型: 闪存
RAM 容量: 8K x 8
电压 - 电源 (Vcc/Vdd): 1.65 V ~ 1.95 V
数据转换器: A/D 8x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 48-VFQFN 裸露焊盘
包装: 带卷 (TR)
配用: AT91SAM-ICE-ND - EMULATOR FOR AT91 ARM7/ARM9
AT91SAM7S-EK-ND - KIT EVAL FOR ARM AT91SAM7S
133
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
Lock bits can be read using Get Lock Bit command (GLB). The n
th lock bit is active when the bit n of the bit mask
is set..
20.2.5.5
Flash General-purpose NVM Commands
General-purpose NVM bits (GP NVM bits) can be set using the Set GPNVM command (SGPB). This command
also activates GP NVM bits. A bit mask is provided as argument to the command. When bit 0 of the bit mask is set,
then the first GP NVM bit is activated.
In the same way, the Clear GPNVM command (CGPB) is used to clear general-purpose NVM bits. All the general-
purpose NVM bits are also cleared by the EA command. The general-purpose NVM bit is deactivated when the
corresponding bit in the pattern value is set to 1.
General-purpose NVM bits can be read using the Get GPNVM Bit command (GGPB). The nth GP NVM bit is active
when bit n of the bit mask is set..
20.2.5.6
Flash Security Bit Command
A security bit can be set using the Set Security Bit command (SSE). Once the security bit is active, the Fast Flash
programming is disabled. No other command can be run. An event on the Erase pin can erase the security bit once
the contents of the Flash have been erased.
The SAM7S512 security bit is controlled by the EFC0. To use the Set Security Bit command, the EFC0 must be
selected using the Select EFC command
Once the security bit is set, it is not possible to access FFPI. The only way to erase the security bit is to erase the
Flash.
In order to erase the Flash, the user must perform the following:
Table 20-12. Get Lock Bit Command
Step
Handshake Sequence
MODE[3:0]
DATA[15:0] or DATA[7:0]
1
Write handshaking
CMDE
GLB
2
Read handshaking
DATA
Lock Bit Mask Status
0 = Lock bit is cleared
1 = Lock bit is set
Table 20-13. Set/Clear GP NVM Command
Step
Handshake Sequence
MODE[3:0]
DATA[15:0] or DATA[7:0]
1
Write handshaking
CMDE
SGPB or CGPB
2
Write handshaking
DATA
GP NVM bit pattern value
Table 20-14. Get GP NVM Bit Command
Step
Handshake Sequence
MODE[3:0]
DATA[15:0] or DATA[7:0]
1
Write handshaking
CMDE
GGPB
2
Read handshaking
DATA
GP NVM Bit Mask Status
0 = GP NVM bit is cleared
1 = GP NVM bit is set
Table 20-15. Set Security Bit Command
Step
Handshake Sequence
MODE[3:0]
DATA[15:0]
1
Write handshaking
CMDE
SSE
2
Write handshaking
DATA
0
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