参数资料
型号: AT91SAM9G20B-CU
厂商: Atmel
文件页数: 24/42页
文件大小: 0K
描述: IC ARM9 MPU 217-LFBGA
产品培训模块: SAM9 MPU Boot Solutions & Application Deployment
MCU Product Line Introduction
标准包装: 126
系列: SAM9G
核心处理器: ARM9
芯体尺寸: 16/32-位
速度: 400MHz
连通性: EBI/EMI,以太网,I²C,IrDA,ISI,MMC,SPI,SSC,UART/USART,USB
外围设备: DMA,POR,PWM,WDT
输入/输出数: 96
程序存储器容量: 64KB(64K x 8)
程序存储器类型: ROM
RAM 容量: 96K x 8
电压 - 电源 (Vcc/Vdd): 0.9 V ~ 1.1 V
数据转换器: A/D 4x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 217-LFBGA
包装: 托盘
配用: AT91SAM9G20-EK-ND - KIT EVAL FOR AT91SAM9G20 MCU
AT91SAM-ICE-ND - EMULATOR FOR AT91 ARM7/ARM9
其它名称: AT91SAM9G20-CU
AT91SAM9G20-CU-ND
30
6384DS–ATARM–13-Jan-10
AT91SAM9G20 Summary
Note:
Setting AIC, SYSC, UHP, ADC and IRQ0-2 bits in the clock set/clear registers of the PMC has no effect. The ADC clock is auto-
matically started for the first conversion. In Sleep Mode the ADC clock is automatically stopped after each conversion.
10.2.1
Peripheral Interrupts and Clock Control
10.2.1.1
System Interrupt
The System Interrupt in Source 1 is the wired-OR of the interrupt signals coming from:
the SDRAM Controller
the Debug Unit
the Periodic Interval Timer
the Real-time Timer
the Watchdog Timer
the Reset Controller
the Power Management Controller
The clock of these peripherals cannot be deactivated and Peripheral ID 1 can only be used
within the Advanced Interrupt Controller.
10.2.1.2
External Interrupts
All external interrupt signals, i.e., the Fast Interrupt signal FIQ or the Interrupt signals IRQ0 to
IRQ2, use a dedicated Peripheral ID. However, there is no clock control associated with these
peripheral IDs.
10.3
Peripheral Signal Multiplexing on I/O Lines
The AT91SAM9G20 features 3 PIO controllers (PIOA, PIOB, PIOC) that multiplex the I/O lines
of the peripheral set.
Each PIO Controller controls up to 32 lines. Each line can be assigned to one of two peripheral
define how the I/O lines of the peripherals A and B are multiplexed on the PIO Controllers. The
two columns “Function” and “Comments” have been inserted in this table for the user’s own
comments; they may be used to track how pins are defined in an application.
Note that some peripheral functions which are output only might be duplicated within both
tables.
The column “Reset State” indicates whether the PIO Line resets in I/O mode or in peripheral
mode. If I/O appears, the PIO Line resets in input with the pull-up enabled, so that the device is
maintained in a static state as soon as the reset is released. As a result, the bit corresponding to
the PIO Line in the register PIO_PSR (Peripheral Status Register) resets low.
If a signal name appears in the “Reset State” column, the PIO Line is assigned to this function
and the corresponding bit in PIO_PSR resets high. This is the case of pins controlling memories,
in particular the address lines, which require the pin to be driven as soon as the reset is
released. Note that the pull-up resistor is also enabled in this case.
29
AIC
Advanced Interrupt Controller
IRQ0
30
AIC
Advanced Interrupt Controller
IRQ1
31
AIC
Advanced Interrupt Controller
IRQ2
Table 10-1.
AT91SAM9G20 Peripheral Identifiers (Continued)
Peripheral ID
Peripheral Mnemonic
Peripheral Name
External Interrupt
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