参数资料
型号: AT91SAM9G20B-CU
厂商: Atmel
文件页数: 5/42页
文件大小: 0K
描述: IC ARM9 MPU 217-LFBGA
产品培训模块: SAM9 MPU Boot Solutions & Application Deployment
MCU Product Line Introduction
标准包装: 126
系列: SAM9G
核心处理器: ARM9
芯体尺寸: 16/32-位
速度: 400MHz
连通性: EBI/EMI,以太网,I²C,IrDA,ISI,MMC,SPI,SSC,UART/USART,USB
外围设备: DMA,POR,PWM,WDT
输入/输出数: 96
程序存储器容量: 64KB(64K x 8)
程序存储器类型: ROM
RAM 容量: 96K x 8
电压 - 电源 (Vcc/Vdd): 0.9 V ~ 1.1 V
数据转换器: A/D 4x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 217-LFBGA
包装: 托盘
配用: AT91SAM9G20-EK-ND - KIT EVAL FOR AT91SAM9G20 MCU
AT91SAM-ICE-ND - EMULATOR FOR AT91 ARM7/ARM9
其它名称: AT91SAM9G20-CU
AT91SAM9G20-CU-ND
13
6384DS–ATARM–13-Jan-10
AT91SAM9G20 Summary
5.
Power Considerations
5.1
Power Supplies
The AT91SAM9G20 has several types of power supply pins:
VDDCORE pins: Power the core, including the processor, the embedded memories and the
peripherals; voltage ranges from 0.9V to 1.1V, 1.0V nominal.
VDDIOM pins: Power the External Bus Interface I/O lines; voltage ranges between 1.65V and
1.95V (1.8V typical) or between 3.0V and 3.6V (3.3V nominal). The voltage range is
selectable by software.
VDDIOP pins: Power the Peripherals I/O lines; voltage ranges from 1.65V to 3.6V.
VDDBU pin: Powers the Slow Clock oscillator, the internal RC oscillator and a part of the
System Controller; voltage ranges from 0.9V to 1.1V, 1.0V nominal.
VDDPLL pin: Powers the PLL cells; voltage ranges from 0.9V to 1.1V.
VDDOSC pin: Powers the Main Oscillator cells; voltage ranges from 1.65V to 3.6V
VDDANA pin: Powers the Analog to Digital Converter; voltage ranges from 3.0V to 3.6V, 3.3V
nominal.
VDDUSB pin: Powers USB transceiver; voltage ranges from 3.0V to 3.6V.
Ground pins GND are common to VDDCORE, VDDIOM, VDDOSC and VDDIOP pins power
supplies. Separated ground pins are provided for VDDBU, VDDPLL, VDDUSB and VDDANA.
These ground pins are respectively GNDBU, GNDPLL, GNDUSB and GNDANA.
5.2
Programmable I/O Lines
The power supplies pins VDDIOM accept two voltage ranges. This allows the device to reach its
maximum speed either out of 1.8V or 3.3V external memories.
The maximum speed is 133 MHz on the pin SDCK (SDRAM Clock) loaded with 10 pF. The other
signals (control, address and data signals) do not go over 66 MHz, loaded with 30 pF for power
supply at 1.8V and 50 pF for power supply at 3.3V.
The EBI I/Os accept two slew rate modes, Fast and Slow. This allows to adapt the rising and fall-
ing time on SDRAM clock, control and data to the bus load.
The voltage ranges and the slew rates are determined by programming VDDIOMSEL and IOSR
bits in the Chip Configuration registers located in the Matrix User Interface.
At reset, the selected voltage defaults to 3.3V nominal and power supply pins can accept either
1.8V or 3.3V. The user must make sure to program the EBI voltage range before getting the
device out of its Slow Clock Mode.
At reset, the selected slew rates defaults are Fast.
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