参数资料
型号: ATA6823C-PHQW
厂商: Atmel
文件页数: 11/27页
文件大小: 0K
描述: IC MOTOR DVR H-BRIDGE 32QFN
标准包装: 4,000
应用: H 桥,PWM 电机控制器
评估套件: 可供
输出数: 1
电流 - 输出: 100mA
电压 - 负载: 7 V ~ 21.2 V
电源电压: 7 V ~ 21.2 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 32-VQFN 裸露焊盘
供应商设备封装: 32-QFN(7x7)
包装: 带卷 (TR)
其它名称: ATA6823C-PHQW-ND
Table 3-2.
Status of the Diagnostic Outputs
CPOK
OT1
OV
UV
SC
DG1
DG2
DG3
0
X
X
X
X
X
1
X
X
X
X
X
1
X
X
X
X
X
1
X
X
X
X
X
1
1
1
1
1
1
Charge pump failure
Overtemperature warning
Overvoltage
Undervoltage
Short circuit
Note:
X represents: don't care – no effect)
OT1: Overtemperature warning
OV: Overvoltage of VBAT
UV: Undervoltage of VBAT
SC: Short circuit
CPOK: Charge pump OK
In order to be able to distinguish between a wake-up from LIN or from EN2, the source of wake-up is flagged in DG1 until the
first valid trigger (LIN = 0, EN2 = 1).
3.8
3.9
3.10
3.11
VG Regulator
The VG regulator is used to generate the gate voltage for the low-side driver. Its output voltage will be used as one input for the
charge pump, which generates the gate voltage for the high-side driver. The purpose of the regulator is to limit the gate voltage
for the external power MOS transistors to 12V. It needs a ceramic capacitor of 470nF for stability. The output voltage is reduced
if the supply voltage at VBAT falls below 12V.
Charge Pump
The integrated charge pump is needed to supply the gates of the external power MOS transistors. It needs a shuffle capacitor of
220nF and a reservoir capacitor of 470nF. Without load, the output voltage on the reservoir capacitor is V VBAT plus VG. The
charge pump is clocked with a dedicated internal oscillator of 100KHz. The charge pump is designed to reach a good EMC
level.
Thermal Shutdown
There is a thermal shutdown block implemented. With rising junction temperature, a first warning level will be reached at 150°C.
At this point the IC stays fully functional and a warning will be sent to the microcontroller. At junction temperature 165°C the
VCC regulator will be switched off and a reset occurs.
H-bridge Driver
The IC includes two push-pull drivers for control of two external power NMOS used as high-side drivers and two push-pull
drivers for control of two external power NMOS used as low-side drivers. The drivers are able to be used with standard and
logic-level power NMOS.
The drivers for the high-side control use the charge pump voltage to supply the gates with a voltage of VG above the battery
voltage level. The low-side drivers are supplied by VG directly. It is possible to control the external load (motor) in the forward
and reverse direction (see Table 3-1 on page 10 ). The duty cycle of the PMW controls the speed. A duty cycle of 100% is
possible in both directions.
Atmel ATA6823C [DATASHEET]
9209E–AUTO–03/12
11
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