参数资料
| 型号： | BD9302FP-E2 |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 11/19页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 2A DL HSOP25 |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 0.8 V ~ 14.4 V |
| 输入电压： | 6 V ~ 18 V |
| 频率 - 开关： | 200kHz ~ 2.5MHz |
| 电流 - 输出： | 2A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 25-SOP（0.213"，5.40mm）+ 2 翼片 |
| 包装： | 标准包装 |
| 供应商设备封装： | 25-HSOP |
| 产品目录页面： | 1373 (CN2011-ZH PDF) |
| 其它名称： | BD9302FP-E2DKR |
(6) Phase compensation
Phase compensation setting procedure
The phase compensation setting procedure varies with the selection of capacitance used for DC/DC converter
application. In this connection, the following section describes the procedure by classifying into the two types.
Furthermore, the application stability conditions are described in the “Description” section.
1. Application stability conditions
2. For output capacitors having high ESR, such as electrolytic capacitor
3. For output capacitors having low ESR, such as ceramic capacitor or OS-CON
About application stability conditions
The following section shows the stability conditions of negative feedback system.
ü At a 1 (0-dB) gain, the phase delay is 150 ? or less (i.e., the phase margin is 30 ? or more).
Furthermore, since the DC/DC converter application is sampled according to the switching frequency, GBW of the
overall system should be set to 1/10 or less of the switching frequency. The following section summarizes the
targeted characteristics of this application.
ü At a 1 (0-dB) gain, the phase delay is 150 ? or less (i.e., the phase margin is 30 ? or more).
ü The GBW (i.e., frequency at 0-dB gain) for this occasion is 1/10 or less of the switching frequency.
Consequently, in order to upgrade the responsiveness, higher switching frequency should be provided.
A knack for ensuring the stability through the phase compensation is to cancel a secondary phase delay (-180 ? )
resulting from LC resonance with a secondary phase lead (i.e., through inserting two phase leads).
Furthermore, the GBW (i.e., frequency at 0-dB gain) is determined according to phase compensation capacitance
to be provided for the error amplifier. Consequently, in order to reduce the GBW, increase the capacitor
capacitance.
(1) Typical (sun) integrator (Low pass filter)
(2) Open loop characteristics of integrator
A
(a)
-20dB/decade
Feed
back
R
A
FB
Gain
[dB]
0
GBW(b)
0
Fig.27
C
Phase
[deg]
-90
-180
-90 ?
位相マージン
-180 ?
Fig.28
Point (a) fa=
1
2 p RCA
1.25 [Hz]
Point (b) fa= GBW
1
2 p RC
[Hz]
Since the error amplifier is provided with (1) or (2) phase compensation, the low pass filter is applied.
In the case of the DC/DC converter application, the R becomes a parallel resistance of the feedback resistance.
11/16
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