参数资料
| 型号： | BD9302FP-E2 |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 14/19页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 2A DL HSOP25 |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 0.8 V ~ 14.4 V |
| 输入电压： | 6 V ~ 18 V |
| 频率 - 开关： | 200kHz ~ 2.5MHz |
| 电流 - 输出： | 2A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 25-SOP（0.213"，5.40mm）+ 2 翼片 |
| 包装： | 标准包装 |
| 供应商设备封装： | 25-HSOP |
| 产品目录页面： | 1373 (CN2011-ZH PDF) |
| 其它名称： | BD9302FP-E2DKR |
Cautions on use
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Absolute maximum ratings
Even though thorough attention is exerted to the quality control of this IC, exceeding the absolute maximum ratings, such
as applied voltage, operating temperature range, etc., can break down the IC. Should the IC break down, it will be
impossible to identify breaking mode such as short circuit mode or an open mode. If any special mode exceeding the
absolute maximum ratings is assumed, consideration should be given to take physical safety measures including use of
fuses, etc.
GND potential
GNDMake setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state.
Thermal design
With consideration given to power dissipation (Pd) in the actual use state, provide the thermal design with an adequate
margin.
Short circuit between pins and erroneous mounting
In order to mount ICs on a set printed circuit board, pay thorough attention to the direction and offset of the ICs.
Erroneous mounting can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering
between pins or between the pin and the power supply or the GND pin, the ICs can break down.
Operation in strong electromagnetic field
Be noted that using ICs in the strong electromagnetic field can malfunction them.
Inspection with set printed circuit board
On the inspection with the set printed circuit board, if a capacitor is connected to a low-impedance pin, the IC can suffer
stress. Therefore, be sure to discharge from the set printed circuit board by each process. For protection against static
electricity, establish a ground for the assembly process and pay thorough attention to the transportation and the storage
of the set printed circuit board. Furthermore, in order to connect the jig for the inspection process, be sure to turn OFF
the power supply and then mount the set printed circuit board to the jig. After the completion of the inspection, be sure to
turn OFF the power supply and then dismount the set printed circuit board from the jig.
IC pin input
This IC is a monolithic IC, which has P+ isolation and P layer between elements to isolate the elements. P-N junction is
formed with this P layer and the N layer of each element, thus composing a variety of parasitic elements.
For example, as shown in Fig. 35, if the resistor and the transistor is connected with the pin respectively,
When GND>(Pin A) for the resistor or GND>(Pin B) for the transistor (NPN), P-N junction will operate as a parasitic
diode.
For the transistor (NPN), when GND>(Pin B), the parasitic NPN transistor will operate with the N layer of other
element in the proximity of the said parasitic diode.
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the
parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the
IC. Therefore, pay thorough attention not to handle the input pins such as to apply to the input pins a voltage lower than
the GND (P layer) so that any parasitic element will operate.
Resistor
Transistor (NPN)
B
(Pin A)
(Pin B)
C
E
GND
N
P +
N
P
P+
P+
N
P
P+
N
P layer
(Pin A)
N
Parasitic element
GND
Parasitic element
N
Parasitic element
(Pin B)
P layer
GND
B
C
N
E
GND
Fig.35 Typical simple construction of monolithic IC
14/16
GND
Parasitic element
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