参数资料
| 型号： | BD9302FP-E2 |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 7/19页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 2A DL HSOP25 |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 0.8 V ~ 14.4 V |
| 输入电压： | 6 V ~ 18 V |
| 频率 - 开关： | 200kHz ~ 2.5MHz |
| 电流 - 输出： | 2A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 25-SOP（0.213"，5.40mm）+ 2 翼片 |
| 包装： | 标准包装 |
| 供应商设备封装： | 25-HSOP |
| 产品目录页面： | 1373 (CN2011-ZH PDF) |
| 其它名称： | BD9302FP-E2DKR |
33pF
100k Ω
PGND1
1
25
SW1L
3300
pF COMP1
20k Ω
FB1
2
3
0.6V
+
-
ERR
OCP
Current
Sense
24
23
SW1
SW1
10
μ H
VO : 3.3V
22k Ω
0.1 μ F
10 μ F
4
6
RT
51k Ω
N.C. 5
SS1/SDWN
slope
+ -
PWM
DRV2 SDWN
Set
DRV1
Reset
SDWN
22
21
BOOT1
PVCC
0.1 μ F
VCC
7
20
PVCC
VCC
SS2/SDWN
8
VREF
Internal
Bias
OSC
UVLO
TSD
5V
19
PVCC
10
μ F
VCC
0.1 μ F
10
11
Reset
30
k Ω
30
k Ω
33
pF
3300 20
pF k Ω
N.C. 9
FB2
COMP2
GND
12
0.6V
+
-
ERR
+ -
PWM
slope
SDWN
Set
DRV1
DRV2 SDWN
OCP
Current
Sense
18
17
16
15
PVCC
BOOT2
SW2
SW2
0.1
μ F
10
μ H
10
μ F
VO : 1.2V
13
PGND2
14
SW2L
Fig.19 Typical application circuit
ü Error amplifier (ERR) block
The ERR block is a circuit used to compare between the 0.6-V reference voltage and the feedback voltage of output
voltage. The COMP voltage, a result of this comparison, determines the switching Duty. Furthermore, soft start function is
activated with the SS voltage while in startup operation. Consequently, the COMP voltage is limited to the SS voltage.
ü Oscillator (OSC) block
The OSC block is a block to determine the switching frequency through the RT pin, which is settable in the range of 100
kHz to 2500 kHz.
ü SLOPE block
The SLOPE block is a block to generate a triangular wave from the clock generated with the OSC and then to transmit the
triangular wave to the PWM comparator.
ü PWM block
The PWM block is used to make comparison between the output COMP voltage of the error amplifier block and the
triangular wave of the SLOPE block, thus determining the switching Duty. The switching duty is limited with the maximum
duty ratio, which is internally determined, and will not reach 100%.
ü Reference voltage (UREF) block
The UREF block is a block to generate a 2.9-V internal reference voltage.
ü Protection circuit (UVLO/TSD) block
The UVLO (Under Voltage Lock Out) circuit is used to shut down the circuit when the voltage falls below approximately 3.3
V, while the TSD (Thermal Shutdown) circuit is used to shut down the circuit at a temperature of 175 ? C and reset it at a
temperature of 160 ? C.
ü Overcurrent protection circuit (OCP)
This function is used to detect a current passing through the power transistor FET with the CURRENT SENSE and activate
the overcurrent protection when the current reaches approximately 4 A. If the overcurrent protection is activated, switching
will be turned OFF to discharge the SS pin capacitance.
7/16
相关PDF资料 |
PDF描述 |
|---|---|
| BD9305AFVM-TR | IC REG CTRLR BUCK PWM 8-MSOP |
| BD9328EFJ-E2 | IC REG BUCK SYNC ADJ 2A 8HTSOP |
| BD9329AEFJ-E2 | IC REG BUCK SYNC ADJ 3A 8HTSOP |
| BD9533EKN-E2 | IC REG SW VAR SOFT START 20-HQFN |
| BD95513MUV-E2 | IC REG BUCK ADJ 3A 32VQFN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| BD9303FP-E2 | 制造商:ROHM Semiconductor 功能描述:1MHZ 2A POWER SWITCH REG. - Tape and Reel 制造商:ROHM Semiconductor 功能描述:POWER SWITCH REG. 1MHZ 2A |
| BD9305AFVM | 制造商:ROHM 制造商全称:Rohm 功能描述:Single-output Step-up,High-efficiency Switching Regulator(Controller Type) |
| BD9305AFVM-TR | 功能描述:直流/直流开关调节器 4.2-18V 100-800kHz 1 Chan Step-Down RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5 |
| BD9306AFVM | 制造商:ROHM 制造商全称:Rohm 功能描述:Single-output Step-up,High-efficiency Switching Regulator(Controller Type) |
| BD9306AFVM-TR | 功能描述:直流/直流开关调节器 4.2-18V 100-800kHz 1 Chan Step-Up RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5 |
发布紧急采购，3分钟左右您将得到回复。