? Internal regulator B
（ VREGB ）
(VCC-5V) is generated from the power supply voltage. The voltage is for the driver of the main MOSFET switch.
Place a capacitor with low ESR (several decades m Ω ) between VREGB and PVCC.
? Oscillator
Placing a resistor and a capacitor to RT and CT, respectively, generates two triangle waves for both cannels, and each wave
is opposite phase. The waves are input to the PWM comparators for CH1 and CH2. Also, the oscillating frequency can be
slightly adjusted (less than 20%) by putting external clock pulse into Fin pin, which is higher frequency than the fixed one.
? Error Amplifier
It amplifies the difference, between the establish output voltage and the actual output one detected at INV. And amplified
voltage comes out from FB. The comparing voltage is 1.0V and the accuracy is ± 2%. The phase can be compensated
externally by placing a resistor and a capacitor between INV and FB.
? PWM Comparator
It converts the output voltage from error amplifier into PWM waveform, then output to MOSFET driver.
? MOSFET Driver
The main drivers (OUT1, OUT2H) are for P-channel MOSFETs, and the driver (OUT2L) for synchronous rectification is for
N-channel MOSFET. The values of output voltage are clamp to VREGB, VREGA, respectively. All drivers’ output
configurations are push-pull type. In addition, the output current capability is 36mA for the sink current and 320mA
(Vds=0.4V) for the source current.
2.Channel Control
Each output can be individually turned on or off with CTL1 and CTL2. When the CTL is “H” (more than 1.5V), it becomes
turned on.
3.Protection
? Over Current Protection （ OCP ）
When detected over current (detecting drop voltage of the main MOSFET’s ON resistance), the MOSFET switch becomes
turned off, and the energy on DTC pin is discharged. After discharged, the output restarts automatically. The level of the
OCP detection threshold can be set by the resistance, which is connected between VCC and CL.
? Short Circuit Protection （ SCP ）
When either output goes down and the voltage on INV pin gets lower than 0.7V, a capacitor placed on SCP is started to
charge.
When the SCP pin becomes more than 2.0V, the main MOSFET switches of both outputs are turned off; then, the outputs are
latched. While they are latched, the IC can be reset by restarting VCC or CTL, or discharging SCP.
? Under Voltage Lock Out （ UVLO ）
Due to avoiding malfunctions when the IC is started up or the power supply voltage is rapidly disconnected, the main
MOSFET switches become off and DTC is discharged when the supply voltage is less than 5.7V. Also, when the output is
latched because of SCP function, the latch becomes reset. Due to preventing malfunctions in the case the power supply
voltage fluctuate at near UVLO threshold, there is 0.1V hysteresis between the detection and reset voltage of UVLO
threshold.
? Thermal Shut Down （ TSD ）
Due to preventing breakdown of the IC by heating up, the main MOSFET switches become off and DTC pin is discharged by
detecting over temperature of the chip. Due to preventing malfunctions in the case temperature fluctuate at near TSD
threshold, there is hysteresis between TSD on and off.
21/29