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参数资料
| 型号： | BR24T256FV-WE2 |
| 厂商： | Rohm Semiconductor |
| 文件页数： | 12/22页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM I2C 256K 400KHZ 8-SSOP |
| 标准包装： | 1 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 256K (32K x 8) |
| 速度： | 400kHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 1.7 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-LSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 8-SSOPB |
| 包装： | 标准包装 |
| 其它名称： | BR24T256FV-WE2DKR |
BR24T □□□□ Series
Technical Note
● Software reset
Software reset is executed when to avoid malfunction after power on, and to reset during command input. Software reset
has several kinds, and 3 kinds of them are shown in the figure below. (Refer to Fig.48-(a), Fig.48-(b), Fig.48-(c).) In
dummy clock input area, release the SDA bus ('H' by pull up). In dummy clock area, ACK output and read data '0' (both 'L'
level) may be output from EEPROM, therefore, if 'H' is input forcibly, output may conflict and over current may flow, leading
to instantaneous power failure of system power source or influence upon devices.
Dummy clock×14
Start×2
SCL
1
2
13
14
Normal command
SDA
Normal command
Fig.48-(a) The case of dummy clock +START+START+ command input
Start
Dummy clock × 9
Start
SCL
1
2
8
9
Normal command
SDA
Normal command
Fig.48-(b) The case of START +9 dummy clocks +START+ command input
Start × 9
SCL
1
2
3
7
8
9
Normal command
SDA
SD
Normal command
Fig.48-(c) START×9+ command input
※ Start command from START input.
● Acknowledge polling
During internal write execution, all input commands are ignored, therefore ACK is not sent back. During internal automatic
write execution after write cycle input, next command (slave address) is sent, and if the first ACK signal sends back 'L', then
it means end of write action, while if it sends back 'H', it means now in writing. By use of acknowledge polling, next
command can be executed without waiting for tWR = 5ms.
When to write continuously, R / W = 0, when to carry out current read cycle after write, slave address R / W = 1 is sent,
and if ACK signal sends back 'L', then execute word address input and data output and so forth.
First write command
During internal write,
ACK = HIGH is sent back.
S
T
A
R
T
Write command
S
T
O
P
S
T Slave
A
R address
T
A
C
K
H
S
T Slave
A
R address
T
A
C
K
H
…
tWR
Second write command
…
S
T Slave
A
R address
T
A
C
K
H
S
T Slave
A
R address
T
A
C
K
L
Word
address
A
C
K
L
Data
A
C
K
L
S
T
O
P
tWR
After completion of internal write,
ACK=LOW is sent back, so input
next word address and data in
succession.
Fig.49 Case to continuously write by acknowledge polling
www.rohm.com
? 2011 ROHM Co., Ltd. All rights reserved.
12/21
2011.03 - Rev.A
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相关代理商/技术参数 |
参数描述 |
|---|---|
| BR24T256FVWGE2 | 制造商:ROHM 制造商全称:Rohm 功能描述:High Reliability Serial EEPROMs |
| BR24T256FVWGTR | 制造商:ROHM 制造商全称:Rohm 功能描述:High Reliability Serial EEPROMs |
| BR24T256F-WE2 | 功能描述:电可擦除可编程只读存储器 Hi-Rel Serial 电可擦除可编程只读存储器 of I2C BUS RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| BR24T256FWGE2 | 制造商:ROHM 制造商全称:Rohm 功能描述:High Reliability Serial EEPROMs |
| BR24T256FWGTR | 制造商:ROHM 制造商全称:Rohm 功能描述:High Reliability Serial EEPROMs |
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