参数资料
型号: BT864AKPF
英文描述: Color Encoder Circuit
中文描述: 颜色编码器电路
文件页数: 11/76页
文件大小: 1050K
代理商: BT864AKPF
field) and resets the I
2
C interface (but does not reset I
2
C registers). RESET*
must be a logical one for normal operation.
100138B
Conexant
1-1
1
1.0 Circuit Description
1.1 Pin Descriptions
Pin names, input/output assignments, numbers, and descriptions are listed in
Table 1-1
.
Figure 1-1
illustrates the Bt864A/865A pinout diagram, and
Figure 1-2
details the block diagram.
Table 1-1. Pin Assignments
(1 of 3)
Pin Name
I/O
Pin #
Description
CLK
I
43
2x pixel clock input (TTL compatible).
RESET*
I
47
Reset control input (TTL compatible). A logical zero disables and resets video
timing (horizontal, vertical, subcarrier counters to the start of VSYNC of first
BLANK*
I
48
Composite blanking control input (TTL compatible). BLANK* is registered on
the rising edge of CLK. The P[7:0] and Y[7:0] inputs are ignored while BLANK*
is a logical zero.
VSYNC*
I/O
49
Vertical sync input/output (TTL compatible). As an output (master mode
operation), VSYNC* is output following the rising edge of CLK. As an input
(slave mode operation), VSYNC* is registered on the rising edge of CLK.
HSYNC*
I/O
50
Horizontal sync input/output (TTL compatible). As an output (master mode
operation), HSYNC* is output following the rising edge of CLK. As an input
(slave mode operation), HSYNC* is registered on the rising edge of CLK.
P[7:0]
I
35
28
YCrCb pixel inputs (TTL compatible) in 8-bit YCrCb mode. CrCb pixel inputs
(TTL compatible) in 16-bit YCrCb mode. A higher index corresponds to a greater
bit significance.
Y[7:0]
I
25, 24, 21
16
Y pixel inputs (TTL compatible) in 16-bit YCrCb mode. Y[7] enables internal
color bars when operating in 8-bit YCrCb mode. A higher index corresponds to a
greater bit significance.
(1)
TTXDAT
I
27
Teletext bit stream input (TTL compatible).
(1)
TTXREQ
O
38
Teletext request output (TTL compatible).
ALTADDR
I
26
Alternate slave address input (TTL compatible). A logical one configures the
device to respond to an I
2
C address of 0x88; a logical zero configures the device
to respond to an I
2
C address of 0x8A.
(1)
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