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参数资料
| 型号： | BU-65743F3-300 |
| 厂商： | DATA DEVICE CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP80 |
| 封装： | 0.880 INCH, CERAMIC, QFP-80 |
| 文件页数： | 74/75页 |
| 文件大小： | 532K |
| 代理商： | BU-65743F3-300 |
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8
Data Device Corporation
www.ddc-web.com
BU-65743/65843/65863/65864
D-06/04-0
The ACE register mapping is located in PCI memory space.
Although the PCI Mini-ACE Mark3 can be accessed in 32-bit
words, all ACE registers are accessed in 16 bit word reads /
writes. If a 32-bit read is performed from the PCI bus in ACE reg-
ister space only the first 16 bits of data are valid.
This data sheet will only describe the PCI registers that are spe-
cific to configuring the integrated terminal and shared RAM. For
specifics or definitions on other PCI bus configuration registers,
please see the PCI Local Bus specification revision 2.2.
Vendor ID field contains the vendor's ID configuration register.
Data Device Corporation's ID code is 4DDCh.
Device ID field is used to indicate the device being used. This
field is configured by DDC to reflect the part value of the device.
The following TABLE 4 represents all possible combinations for
the Device ID field:
TABLE 3. CONFIGURATION REGISTER SPACE FOR THE PCI MINI-ACE MARK3/MICRO-ACE TE
00h
ADDRESS
04h
08h
04h
31
24 23
16 15
8 70
Device ID
Vendor ID
0Xh
(X varies with part #,
see text)
DDC Manufacturer Device ID value (4DDCH)
Status Register
Command Register
Class Code = 078000h
Rev ID = 02h
0Ch
BIST
00h
Cache Line Size
00h
Header Type
00h
Latency Timer
00h
10h
R/W
Base Address Register 0 (for ACE memory)
R/W and 0’s
(see text)
00h
14h
R/W
Base Address Register 1 (for ACE registers)
R/W
R/W and 0’s
(see text)
00h
18h - 24h
Base Address Registers 2 through 5 (not used) 00000000h
28h
Card Bus CIS pointer (not used) 00000000h
2Ch
Subsystem Device and Subsystem Vendor ID Same as Configuration Register 0, Alias Reads to Configuration Register 00
30h
Expansion ROM Base Address (Not Used, bit = 0)
34h-38h
Reserved
3Ch
Max Lat
00h
Interrupt Line
R/W
Min Gnt
00h
Interrupt Pin
00h
RT ONLY WITH 4K OF RAM (BU-65743)
0404h
BC/RT/MT WITH 64K OF RAM (BU-65864)
0402h
BC/RT/MT WITH 4K OF RAM (BU-65843)
0400h
DESCRIPTION
DEVICE ID
TABLE 4. DEVICE ID FIELD MAPPING
SERR# ENABLE
8
0
9
RESERVED, 0’S
15:10
DESCRIPTION
BIT
TABLE 5. PCI COMMAND REGISTER
0
5:2
PARITY ERROR CONTROL
6
0
7
0
0 (LSB)
MEMORY SPACE
1
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| BU-65863F3-310 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP80 |
| BU-65743F3-200 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP80 |
| BU-65863F3-220 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP80 |
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