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参数资料
| 型号： | BX80552641T2 |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 3200 MHz, MICROPROCESSOR, PBGA775 |
| 封装： | FLIP CHIP, LGA-775 |
| 文件页数： | 30/108页 |
| 文件大小： | 3283K |
| 代理商： | BX80552641T2 |
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30
Datasheet
Electrical Specifications
2.6.3
Processor DC Specifications
The processor DC specifications in this section are defined at the processor core (pads) unless
otherwise stated. All specifications apply to all frequencies and cache sizes unless otherwise
stated.
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. VIL is defined as the voltage range at a receiving agent that will be interpreted as a logical low value.
3. VIH is defined as the voltage range at a receiving agent that will be interpreted as a logical high value.
4. VIH and VOH may experience excursions above VTT. However, input signal drivers must comply with the
signal quality specifications.
5. The VTT referred to in these specifications is the instantaneous VTT.
6. Leakage to VSS with land held at VTT.
7. Leakage to VTT with land held at 300m V.
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. All outputs are open drain.
3. VIL is defined as the voltage range at a receiving agent that will be interpreted as a logical low value.
4. VIH is defined as the voltage range at a receiving agent that will be interpreted as a logical high value.
5. VIH and VOH may experience excursions above VTT. However, input signal drivers must comply with the
signal quality specifications.
6. The VTT referred to in these specifications refers to instantaneous VTT.
7. The maximum output current is based on maximum current handling capability of the buffer and is not
specified into the test load.
8. Leakage to VSS with land held at VTT.
9. Leakage to VTT with land held at 300 mV.
Table 2-9. GTL+ Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes1
VIL
Input Low Voltage
0.0
GTLREF – (0.10 * VTT)V
2, 5
VIH
Input High Voltage
GTLREF + (0.10 * VTT)VTT
V
3, 4, 5
VOH
Output High Voltage
0.90*VTT
VTT
V4, 6
IOL
Output Low Current
N/A
VTT_MAX/
[(0.50*RTT_MIN)+(RON_MIN)]
A-
ILI
Input Leakage Current
N/A
± 200
A
6
ILO
Output Leakage
Current
N/A
± 200
A
7
RON
Buffer On Resistance
6
12
Ω
Table 2-10. GTL+ Asynchronous Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes1
VIL
Input Low Voltage
0.0
VTT/2 – (0.10 * VTT)V
3, 10
VIH
Input High Voltage
VTT/2 + (0.10 * VTT)VTT
V
4, 5, 6, 10
VOH
Output High Voltage
0.90*VTT
VTT
V
2, 5, 6
IOL
Output Low Current
—
VTT/
[(0.50*RTT_MIN)+(RON_MIN)]
A7
ILI
Input Leakage Current
N/A
± 200
A
8
ILO
Output Leakage Current
N/A
± 200
A
9
RON
Buffer On Resistance
6
12
Ω
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