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参数资料
| 型号： | BX80552651 |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 3400 MHz, MICROPROCESSOR, PBGA775 |
| 封装： | FLIP CHIP, LGA-775 |
| 文件页数： | 99/108页 |
| 文件大小： | 3283K |
| 代理商： | BX80552651 |
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92
Datasheet
Features
6.2.3
Stop Grant State
When the STPCLK# signal is asserted, the Stop Grant state of the processor is entered 20 bus
clocks after the response phase of the processor-issued Stop Grant Acknowledge special bus cycle.
Since the GTL+ signals receive power from the FSB, these signals should not be driven (allowing
the level to return to V
TT) for minimum power drawn by the termination resistors in this state. In
addition, all other input signals on the FSB should be driven to the inactive state.
BINIT# will not be serviced while the processor is in Stop Grant state. The event will be latched
and can be serviced by software upon exit from the Stop Grant state.
RESET# causes the processor to immediately initialize itself, but the processor will stay in Stop-
Grant state. A transition back to the Normal state will occur with the de-assertion of the STPCLK#
signal.
A transition to the Grant Snoop state will occur when the processor detects a snoop on the FSB (see
While in the Stop-Grant State, SMI#, INIT#, BINIT#, and LINT[1:0] will be latched by the
processor, and only serviced when the processor returns to the Normal State. Only one occurrence
of each event will be recognized upon return to the Normal state.
While in Stop-Grant state, the processor will process a FSB snoop.
6.2.4
Enhanced HALT Snoop or HALT Snoop State,
Stop Grant Snoop State
The Enhanced HALT Snoop State is used in conjunction with the new Enhanced HALT state. If
Enhanced HALT state is not enabled in the BIOS, the default Snoop State entered will be the
HALT Snoop State. Refer to the following sections for details on HALT Snoop State, Grant Snoop
State and Enhanced HALT Snoop State.
6.2.4.1
HALT Snoop State, Stop Grant Snoop State
The processor will respond to snoop transactions on the FSB while in Stop-Grant state or in HALT
Power Down state. During a snoop transaction, the processor enters the HALT Snoop State:Stop
Grant Snoop state. The processor will stay in this state until the snoop on the FSB has been
serviced (whether by the processor or another agent on the FSB). After the snoop is serviced, the
processor will return to the Stop Grant state or HALT Power Down state, as appropriate.
6.2.4.2
Enhanced HALT Snoop State
The Enhanced HALT Snoop State is the default Snoop State when the Enhanced HALT state is
enabled via the BIOS. The processor will remain in the lower bus ratio and VID operating point of
the Enhanced HALT state.
While in the Enhanced HALT Snoop State, snoops are handled the same way as in the HALT
Snoop State. After the snoop is serviced the processor will return to the Enhanced HALT state.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| BX80552651T2 | 制造商:Intel 功能描述:P4 651 3.4GHZ LP-BTX 2MB - Boxed Product (Development Kits) |
| BX80552651T2 S L94W | 制造商:Intel 功能描述:MPU Pentium 制造商:Intel 功能描述:MPU Pentium? 4 Processor 651 65nm 3.4GHz 775-Pin FCLGA6 |
| BX80552651T2 S L9KE | 制造商:Intel 功能描述:MPU Pentium |
| BX80552661T2 | 制造商:Intel 功能描述:P4 661 3.6GHZ LP-BTX 2MB - Boxed Product (Development Kits) |
| BX80553915 S L9KB | 制造商:Intel 功能描述: |
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