- 您现在的位置：买卖IC网 > PDF目录298893 > BXM80526B600128 (INTEL CORP) 64-BIT, 600 MHz, MICROPROCESSOR, PBGA495 PDF资料下载
参数资料
| 型号： | BXM80526B600128 |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 64-BIT, 600 MHz, MICROPROCESSOR, PBGA495 |
| 封装： | BGA2-495 |
| 文件页数： | 16/74页 |
| 文件大小： | 870K |
| 代理商： | BXM80526B600128 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页当前第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页
Mobile Intel Celeron Processor (0.18) in BGA2 and Micro-PGA2 Packages
at 700MHz, 650 MHz, 600 MHz, 550 MHz, 500 MHz, 450 MHz,
Low-voltage 500 MHz, and Low-voltage 400A MHz
Datasheet
Order#-XXX
16
The signals on the mobile Celeron processor system bus are included in the GTL+ signal group.
These signals are specified to be terminated to VCCT. The DC specifications for these signals are
listed in Table 10 and the termination and reference voltage specifications for these signals are
to the Mobile Pentium III Processor GTL+ System Bus Layout Guideline for full details of system
VCCT and VREF requirements. The CMOS, Open-drain, and TAP signals are designed to interface
at 1.5V levels to allow connection to other devices. BCLK and PICCLK are designed to receive a
2.5-V clock signal. The DC specifications for these signals are listed Table 12.
Table 10. GTL+ Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit Notes
VOH
Output High Voltage
—
V
RON
Output Low Drive Strength
16.67
IL
Leakage Current for Inputs, Outputs and I/Os
±100
A
Note 1
NOTE:
(0
≤ VIN/OUT ≤ VCCT).
Table 11. GTL+ Bus DC Specifications
Symbol
Parameter
Min
Typ
Max
Unit
Notes
VCCT
Bus Termination Voltage
1.385
1.5
1.615
V
Note 1
VREF
Input Reference Voltage
2/
3VCCT – 2%
2/
3VCCT
2/
3VCCT + 2%
V
±2%, Note 2
RTT
Bus Termination Strength
50
56
65
On-die RTT,
Note 3
NOTES:
1.
For simulation use 1.5V ±10%. For typical simulation conditions use VCCTmin (1.5V –10%).
2.
VREF should be created from VCCT by a voltage divider.
3.
The RESET# signal does not have an on-die RTT. It requires an off-die 56.2
±1% terminating resistor connected to
VCCT.
相关PDF资料 |
PDF描述 |
|---|---|
| BXM80526B700128 | 64-BIT, 700 MHz, MICROPROCESSOR, CPGA495 |
| BXM80526B700 | 64-BIT, 700 MHz, MICROPROCESSOR, CPGA495 |
| BXM80536GC2100F | 32-BIT, 2100 MHz, MICROPROCESSOR, CPGA478 |
| BXM80536GC1800F | 32-BIT, 1800 MHz, MICROPROCESSOR, CPGA478 |
| BXM80536GC1600F | 32-BIT, 1600 MHz, MICROPROCESSOR, CPGA478 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| BXM80536NC1400ES L7LS | 制造商:Intel 功能描述:CELERON M,360,1.40GHZ,1M CACHE, 400MHZ FSB,1.26V,UFCPGA - Boxed Product (Development Kits) |
| BXMP1000 | 制造商:SPECTRUM 制造商全称:Spectrum Microwave, Inc. 功能描述:RF AMPLIFIER |
| BXMP1001 | 制造商:SPECTRUM 制造商全称:Spectrum Microwave, Inc. 功能描述:RF AMPLIFIER |
| BXMP1002 | 制造商:SPECTRUM 制造商全称:Spectrum Microwave, Inc. 功能描述:RF AMPLIFIER |
| BXMP1003 | 制造商:SPECTRUM 制造商全称:Spectrum Microwave, Inc. 功能描述:RF AMPLIFIER |
发布紧急采购，3分钟左右您将得到回复。