参数资料
型号: C9706AY
英文描述: ST92141 - 8/16 BIT MCU FOR 3-PHASE AC MOTOR CONTROL
中文描述: CPU系统时钟发生器| SSOP封装| 48PIN |塑料
文件页数: 6/19页
文件大小: 248K
代理商: C9706AY
C9706
Clock Generator for VIA VT8371/Athlon (K7) Chipset Systems
Approved Product
Cypress Semiconductor Corporation
525 Los Coches St.
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
http://www.cypress.com
Document#: 38-07041 Rev. **
05/02/2001
Page 6 of 19
Power Down Timing
Power down (asserting the PWR_DN# pin) is an asynchronous event in the device. When PWR_DN is brought low, the
device internally removes power from all control logic. All outputs are driven to a logic low level. The exception is the
CPU# pins which are released to a high (floating) state. It is the designer’s responsibility to ensure all system timing and
sequencing needs are met before applying and releasing this pin. It is intended to be used as a system power savings
feature and will put the device into its lowest power consumption mode while still retaining the minimum control logic
functionally needed to produce an orderly startup when PWR_DN# is released to a high state.
Spectrum Spread Clocking
Spread Spectrum is a modulation technique applied here for maximum efficiency in minimizing Electro-Magnetic
Interference radiation generated from repetitive digital signals mainly clocks. A clock accumulates EM energy at the
center frequency it is generating. Spread Spectrum distributes this energy over a small frequency bandwidth therefore
distributing an even amount of energy over a wider spectrum. In this device, Spread Spectrum is enabled by setting
SMBus byte0, bit3 = 1. The default of the device at power up keeps the Spread Spectrum disabled, it is therefore,
important to have SMBus accessibility to turn-on the Spread Spectrum function. See Table 3 for Spread selection.
Center Spread
Down Spread
Fig.6A
Fig. 6B
SBW2
0
0
0
0
1
1
1
1
SBW1
0
0
1
1
0
0
1
1
SBW0
0
1
0
1
0
1
0
1
Table 3
Spread
±
0.25%
±
0.12%
±
0.37%
±
0.50%
- 0.50%
- 0.25%
- 0.75%
+ 0.25%, - 0.75%
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