- 您现在的位置：买卖IC网 > PDF目录366628 > C9812DYB Up to 5A ULDO linear regulator PDF资料下载
参数资料
| 型号： | C9812DYB |
| 英文描述： | Up to 5A ULDO linear regulator |
| 中文描述： | CPU系统时钟发生器| SSOP封装| 56PIN |塑料 |
| 文件页数： | 3/18页 |
| 文件大小： | 268K |
| 代理商： | C9812DYB |
Low EMI Clock Generator for Intel
810E Chipset Systems
Cypress Semiconductor Corporation
525 Los Coches St.
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
http://www.cypress.com
Document#: 38-07053 Rev. **
05/03/01
Page 3 of 18
APPROVED PRODUCT
C9812
Test Mode Function
Test Mode Functionality
SEL2
SEL1
x
0
SEL0
1
CPU
TCLK/2
SDRAM
TCLK/2
3V66
TCLK/3
Table 2
PCI
48 MHz
TCLK/2
REF
TCLK
IOAPIC
TCLK/6
TCLK/6
Note
:
TCLK is a test clock over driven on the XIN input during test mode.
Power Management Functions
Power Management on this device is controlled by a single pin, PD# (pin32). When PD# is high (default) the device is in
running and all signals are active.
When PD# is asserted (forced) low, the device is in shutdown (or in power down) mode and all power supplies (3.3V and
2.5V except for VDDA/pin 27) may be removed. When in power down, all outputs are synchronously stopped in a low
state (see Fig.2 below), all PLL’s are shut off, and the crystal oscillator is disabled. When the device is shutdown the I2C
function is also disabled.
Power Management Timing
100MHz
PCI
33MHz
SDRAM
CLOCK
REF
33MHz
Undefined
CPU
66MHz
30nS
0nS
IOAPIC
3V66
100MHz
20nS
10nS
40nS
50nS
PWRDN#
USB
14
.
3MHz
48MHz
Undefined
Undefined
Fig.2
Power Management Current
PD#
,
SEL[2..0]
(CPU Clock)
0XXX (Power down)
1010 (66MHz)
1011 (100MHz)
111X (133MHz)
Maximum 2.5 Volt Current
Consumption (VDD2.5 =2.625)
100 μA
70 mA
100 mA
133 mA
Table 3
Maximum 3.3 Volt Current Consumption
(VDD3.3 = 3.465 V)
200 μA
280 mA
280 mA
280 mA
When exiting the power down mode, the designer must supply power to the VDD pins first, a minimum of 200mS before
releasing the PD# pin high.
相关PDF资料 |
PDF描述 |
|---|---|
| C9815DY | Up to 5A ULDO linear regulator |
| C9821GQ | Up to 5A ULDO linear regulator |
| C9822EQ | Up to 5A ULDO linear regulator |
| C9827JT | Up to 5A ULDO linear regulator |
| C9827JY | Up to 5A ULDO linear regulator |
相关代理商/技术参数 |
参数描述 |
|---|---|
| C98130-A1231-C30 | 制造商:Siemens 功能描述: |
| C9815DY | 制造商:未知厂家 制造商全称:未知厂家 功能描述:CPU SYSTEM CLOCK GENERATOR|SSOP|56PIN|PLASTIC |
| C981FFN-CTN | 制造商:Thomas & Betts 功能描述:1" FSC 1-GANG WP BOX 18 CU IN-CAN |
| C981U103MYVDAA7317 | 功能描述:瓷片电容器 250volts 0.01uF 20% Y5V RoHS:否 制造商:Kemet 电容:0.01 uF 容差:20 % 电压额定值:250 V 工作温度范围: 损耗因数 DF: 端接类型:Radial 产品:AC Line Rated Class X1/Y2 Capacitors |
| C981U103MYVDAAWL20 | 功能描述:10000pF 400VAC 陶瓷电容器 Y5V（F） 径向，圆盘 0.591" 直径（15.00mm） 制造商:kemet 系列:C900 包装:散装 零件状态:有效 电容:10000pF 容差:±20% 电压 - 额定:400VAC 温度系数:Y5V（F） 安装类型:通孔 工作温度:-40°C ~ 125°C 应用:安全 等级:X1，Y2 封装/外壳:径向，圆盘 大小/尺寸:0.591" 直径（15.00mm） 高度 - 安装（最大值）:- 厚度（最大值）:- 引线间距:0.394"（10.00mm） 特性:- 引线形式:直形 标准包装:500 |
发布紧急采购，3分钟左右您将得到回复。