参数资料
型号: CAT150029SWI-GT3
厂商: ON Semiconductor
文件页数: 5/15页
文件大小: 0K
描述: IC SUPERVISOR 2KB SPI EEPR 8SOIC
标准包装: 3,000
类型: 简单复位/加电复位
监视电压数目: 1
输出: 推挽式,图腾柱
复位: 低有效
复位超时: 最小为 140 ms
电压 - 阀值: 2.93V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 带卷 (TR)
其它名称: 150029SWI-GT3
CAT15002, CAT15004
PIN DESCRIPTION
ˉˉˉˉˉˉ
RESET/ RESET : Reset output is available in two
versions: CMOS Active Low (CAT150xx9) and CMOS
Active High (CAT150xx1). Both versions are push-pull
outputs for high efficiency.
SI: The serial data input pin accepts op-codes,
addresses and data. In SPI modes (0,0) and (1,1)
input data is latched on the rising edge of the SCK
clock input.
SO: The serial data output pin is used to transfer data
out of the device. In SPI modes (0,0) and (1,1) data is
shifted out on the falling edge of the SCK clock.
ˉˉ
ˉˉ
ˉˉ
SCK: The serial clock input pin accepts the clock
provided by the host and used for synchronizing
communication between host and CAT15002/04.
CS : The chip select input pin is used to enable/disable
the CAT15002/04. When CS is high, the SO output is
tri-stated (high impedance) and the device is in
Standby Mode (unless an internal write operation is in
progress). Every communication session between host
and CAT15002/04 must be preceded by a high to low
transition and concluded with a low to high transition of
the CS input.
WP
WP
ˉˉˉ: The write protect input pin will allow all write
operations to the device when held high. When ˉˉˉ
pin is tied low all write operations are inhibited.
V TH
V CC
V RVALID
DEVICE OPERATION
The CAT15002/04 products combine the accurate
voltage monitoring capabilities of a standalone voltage
supervisor with the high quality and reliability of
standard EEPROMs from Catalyst Semiconductor.
RESET CONTROLLER DESCRIPTION
The reset signal is asserted LOW for the CAT150xx9
and HIGH for the CAT150xx1 when the power supply
voltage falls below the threshold trip voltage and
remains asserted for at least 140ms (t PURST ) after the
power supply voltage has risen above the threshold.
Reset output timing is shown in Figure 1.
The CAT15002/04 devices protect μPs against brown-out
failure. Short duration V CC transients of 4μsec or less and
100mV amplitude typically do not generate a Reset pulse.
RESE T
RESE T
t PURST
t RPD
t PURST
t RPD
CAT150xx9
CAT150xx1
Figure 1. RESET Output Timing
? 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
5
Doc. No. MD-1126 Rev. B
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