参数资料
型号: CAT150029SWI-GT3
厂商: ON Semiconductor
文件页数: 6/15页
文件大小: 0K
描述: IC SUPERVISOR 2KB SPI EEPR 8SOIC
标准包装: 3,000
类型: 简单复位/加电复位
监视电压数目: 1
输出: 推挽式,图腾柱
复位: 低有效
复位超时: 最小为 140 ms
电压 - 阀值: 2.93V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 带卷 (TR)
其它名称: 150029SWI-GT3
CAT15002, CAT15004
Figure 2 shows the maximum pulse duration of
negative-going V CC transients that do not cause a reset
condition. As the amplitude of the transient goes further
below the threshold (increasing V TH - V CC ), the
maximum pulse duration decreases. In this test, the
V CC starts from an initial voltage of 0.5V above the
threshold and drops below it by the amplitude of the
overdrive voltage (V TH - V CC ).
T AMB = 25oC
CAT150xxZ
CAT150xxM
EMBEDDED EEPROM DESCRIPTION
The CAT15002/04 devices support the Serial Peripheral
Interface (SPI) bus protocol, modes (0,0) and (1,1). The
device contains an 8-bit instruction register. The
instruction set and associated op-codes are listed in
Table 1.
Reading data stored in the CAT15002/04 is accom–
plished by simply providing the READ command and an
address. Writing to the CAT15002/04, in addition to a
WRITE command, address and data, also requires
enabling the device for writing by first setting certain bits
in a Status Register, as will be explained later.
ˉˉ
After a high to low transition on the CS input pin, the
CAT15002/04 will accept any one of the six instruction
op-codes listed in Table 1 and will ignore all other
possible 8-bit combinations. The communication
protocol follows the timing from Figure 3.
Table 1: Instruction Set
Instruction
WREN
Opcode
0000 0110
Operation
Enable Write Operations
RESET OVERDRIVE V TH - V CC [mV]
Figure 2. Maximum Transient Duration without
Causing a Reset Pulse vs. Overdrive Voltage
WRDI
RDSR
WRSR
READ
WRITE
0000 0100
0000 0101
0000 0001
0000 x011
0000 x010
Disable Write Operations
Read Status Register
Write Status Register
Read Data from Memory
Write Data to Memory
Note:
x = 0 for CAT15002,
x = A8 for CAT15004
Figure 3. Synchronous Data Timing
CS
V IH
t CS
V IL
t CSS
t CSH
SCK
V IH
t WH
t WL
V IL
t SU
t H
SI
V IH
VIL
VALID IN
t RI
tFI
t V
t HO
t DIS
SO
V OH
HI-Z
HI-Z
V OL
Note: Dashed Line = mode (1, 1) - - - - - -
Doc. No. MD-1126 Rev. B
6
? 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
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