参数资料
型号: CDB5464U
厂商: Cirrus Logic Inc
文件页数: 6/46页
文件大小: 0K
描述: BOARD EVAL FOR CS5464 ADC
标准包装: 1
主要目的: 电源管理,电度表/功率表
嵌入式: 是,MCU,8 位
已用 IC / 零件: CS5464
主要属性: 电能表
次要属性: 图形用户接口,SPI? 和 USB 接口
已供物品: 板,线缆,软件
产品目录页面: 754 (CN2011-ZH PDF)
相关产品: CS5464-ISZR-ND - IC ENERGY METERING 1PHASE 28SSOP
598-1194-5-ND - IC ENERGY METERING 1PHASE 28SSOP
598-1193-5-ND - IC PWR/ENERGY METER 3CH 28-SSOP
其它名称: 598-1554
CDB-5464U
CS5464
2. PIN DESCRIPTION
Crystal Out
CPU Clock Output
Positive Digital Supply
Digital Ground
Serial Clock
Serial Data Ouput
Chip Select
Mode Select
Differential Voltage Input
Differential Voltage Input
Voltage Reference Output
Voltage Reference Input
Factory Test
Factory Test
XOUT
CPUCLK
VD+
DGND
SCLK
SDO
CS
MODE
VIN+
VIN-
VREFOUT
VREFIN
TEST1
TEST2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
XIN
SDI
E2
E1
INT
RESET
E3
PFMON
IIN1+
IIN1-
VA+
AGND
IIN2+
IIN2-
Crystal In
Serial Data Input
Energy Output 2
Energy Output 1
Interrupt
Reset
Energy Output 3
Power Fail Monitor
Differential Current Input
Differential Current Input
Positive Analog Supply
Analog Ground
Differential Current Input
Differential Current Input
Clock Generator
Crystal Out
Crystal In
CPU Clock Output
1,28
2
XOUT, XIN — Connect to an external quartz crystal. Alternatively, an external clock can be sup-
plied to the XIN pin to provide the system clock for the device.
CPUCLK - Logic-level output from crystal oscillator. Can be used to clock an external CPU.
Control Pins and Serial Data I/O
Serial Clock
Serial Data Output
Chip Select
Mode Select
5
6
7
8
SCLK — Clocks serial data from the SDI pin and to the SDO pin when CS is low. SCLK is a
Schmitt-trigger input when MODE is low and a driven output when MODE is high.
SDO — Serial data output. Data is clocked out by SCLK.
CS — An input that enables the serial interface when MODE is low and a driven output when
MODE is high.
MODE — High selects external E 2 PROM, Low selects external microcontroller. MODE includes a
weak internal pull-down and therefore selects microcontroller mode if not connected.
Energy Outputs
22, 25, E3, E1, E2 — Primarily active-low energy pulse outputs. These can be programmed to output
26
other conditions.
Reset
Interrupt
Serial Data Input
Analog Inputs/Outputs
Differential Voltage Inputs
23
24
27
9,10
RESET — An active-low Schmitt-trigger input used to reset the chip.
INT — Active-low output, indicates that an enabled condition has occurred.
SDI — Serial data input. Data is clocked in by SCLK.
VIN+, VIN- — Differential analog inputs for the voltage channel.
Differential Current Inputs
20,19, IIN1+, IIN1-, IIN2+, IIN2- — Differential analog inputs for the current channels.
16,15
Power Fail Monitor
Voltage Reference Output
Voltage Reference Input
21
11
12
PFMON — Used to monitor the unregulated power supply via a resistive divider. If the PFMON
voltage drops below its low limit, the low-supply detect (LSD) bit is set in the Status register.
VREFOUT — The on-chip voltage reference output. Nominally 2.5 V, referenced to AGND.
VREFIN — The voltage reference input. Can be connected to VREFOUT or external 2.5 V refer-
ence.
Power Connections
Positive Digital Supply
Digital Ground
Positive Analog Supply
Analog Ground
Other Pins
Test1, Test2
6
3
4
18
17
13,14
VD+ — The positive digital supply.
DGND — Digital ground.
VA+ — The positive analog supply.
AGND — Analog ground.
NC — Factory use only. Connect to AGND.
DS682F3
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