参数资料
型号: CS4333-KSR
厂商: CRYSTAL SEMICONDUCTOR CORP
元件分类: DAC
中文描述: SERIAL INPUT LOADING, 18-BIT DAC, PDSO8
封装: PLASTIC, SOIC-8
文件页数: 5/29页
文件大小: 1076K
代理商: CS4333-KSR
CS4970x4 Data Sheet
32-bit High Definition Audio Decoder DSP Family
DS752PP10
13
Figure 3. Serial Control Port - SPI Slave Mode Timing
5.11 Switching Characteristics — Serial Control Port - SPI Master Mode
Parameter
Symbol
Min
Typical
Max
Units
SCP_CLK frequency1, 2
1. The specification fspisck indicates the maximum speed of the hardware. The system designer should be aware that the actual
maximum speed of the communication port may be limited by the firmware application.
3. SCP_CLK PERIOD refers to the period of SCP_CLK as being used in a given application. It does not refer to a tested parameter.
fspisck
——
Fxtal/2
MHz
SCP_CS falling to SCP_CLK rising 3
tspicss
11*DCLKP +
(SCP_CLK PERIOD)/2
—ns
SCP_CLK low time
tspickl
18
ns
SCP_CLK high time
tspickh
18
ns
Setup time SCP_MISO input
tspidsu
11
ns
Hold time SCP_MISO input
tspidh
5—
ns
SCP_CLK low to SCP_MOSI output valid
tspidov
——
11
ns
SCP_CLK low to SCP_CS falling
tspicsl
7—
ns
SCP_CLK low to SCP_CS rising
tspicsh
11*DCLKP +
(SCP_CLK PERIOD)/2
—ns
Bus free time between active SCP_CS
tspicsx
3*DCLKP
ns
SCP_CLK falling to SCP_MOSI output high-Z
tspidz
20
ns
SCP_BSY#
SCP_CS#
SCP_CLK
SCP_MOSI
SCP_MISO
SCP_IRQ#
0
12670
56
7
tspicss
tspickl
tspickh
tspidsu
tspidh
tspidov
A6
A5
A0
R/W
MSB
LSB
MSB
LSB
tspicsh
tspibsyl
tspiirql
tspiirqh
fspisck
tspicsdz
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