参数资料
| 型号： | CS4398-CZZ |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 19/46页 |
| 文件大小： | 0K |
| 描述： | IC DAC 120DB 192KHZ W/VC 28TSSOP |
| 标准包装： | 50 |
| 位数： | 24 |
| 数据接口： | 串行 |
| 转换器数目： | 2 |
| 电压电源： | 模拟和数字 |
| 功率耗散（最大）： | 340mW |
| 工作温度： | -10°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 28-TSSOP |
| 包装： | 管件 |
| 输出数目和类型： | 4 电压，单极 |
| 采样率（每秒）： | 216k |
| 产品目录页面： | 757 (CN2011-ZH PDF) |
| 配用： | 598-1155-ND - BOARD EVAL FOR CS4398 DAC |
| 其它名称： | 598-1067-5 |
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DS568F1
CS4398
5.4.1
Writing in IC Format
To communicate with the CS4398, initiate a START condition of the bus (see Figure 14.). Next, send the
chip address. The eighth bit of the address byte is the R/W bit (low for a write). The next byte is the Mem-
ory Address Pointer, MAP, which selects the register to be read or written. The MAP is then followed by
the data to be written. To write multiple registers, continue providing a clock and data, waiting for the
CS4398 to acknowledge between each byte. To end the transaction, send a STOP condition.
5.4.2
Reading in IC Format
To communicate with the CS4398, initiate a START condition of the bus (see Figure 14.). Next, send the
chip address. The eighth bit of the address byte is the R/W bit (high for a read). The contents of the reg-
ister pointed to by the MAP will be output after the chip address. To read multiple registers, continue pro-
viding a clock and issue an ACK after each byte. To end the transaction, send a STOP condition.
5.5
SPI Format
In SPI format, CS is the CS4398 chip select signal; CCLK is the Control Port bit clock; CDIN is the input
data line from the microcontroller; CDOUT is the output data line and the chip address is 1001100. CS,
CCLK,and CDIN are all inputs, and data is clocked in on the rising edge of CCLK. CDOUT is an output and
is high-impedance when not actively outputting data.
5.5.1
Writing in SPI
Figure 15 shows the operation of the Control Port in SPI format. To write to a register, bring CS low. The
first seven bits on CDIN form the chip address and must be 1001100. The eighth bit is a read/write indi-
cator (R/W), which must be low to write. The next eight bits form the Memory Address Pointer (MAP),
which is set to the address of the register that is to be updated. The next eight bits are the data that will
be placed into register designated by the MAP. To write multiple registers, keep CS low and continue pro-
viding clocks on CCLK. End the read transaction by setting CS high.
SD A
SC L
100 1 1
AD 1
R/W
Sta rt
AC K
DA T A
1-8
AC K
DAT A
1-8
ACK
Sto p
N o te : If o peratio n is a w rite, th is byte contain s th e M em o ry A ddress P o inter, M A P .
No te 1
AD 0
Figure 14. Control Port Timing, IC Format
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CS4398-CZZR | 功能描述:数模转换器- DAC IC 120dB 192kHz Mlt-Bt DAC w/Volctrl RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| CS4399-CNZ | 功能描述:HIPRFDACINTGHPDRIVR&IMPED DETCTN 制造商:cirrus logic inc. 系列:* 包装:托盘 零件状态:在售 安装类型:表面贴装 封装/外壳:40-WFQFN 裸露焊盘 供应商器件封装:40-QFN（5x5） 标准包装:490 |
| CS4399-CNZR | 功能描述:HIPRFDACINTGHPDRIVR&IMPED DETCTN 制造商:cirrus logic inc. 系列:* 包装:剪切带（CT） 零件状态:在售 安装类型:表面贴装 封装/外壳:40-WFQFN 裸露焊盘 供应商器件封装:40-QFN（5x5） 标准包装:1 |
| CS4399-CWZR | 功能描述:HIPRFDACINTGHPDRIVR&IMPED DETCTN 制造商:cirrus logic inc. 系列:* 包装:剪切带（CT） 零件状态:在售 安装类型:表面贴装 封装/外壳:42-UFBGA，WLCSP 供应商器件封装:42-WLCSP 标准包装:1 |
| CS43L21 | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:Low Power, Stereo Digital to Analog Converter |
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