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参数资料
| 型号： | CS5346-DQZR |
| 厂商： | CIRRUS LOGIC INC |
| 元件分类： | ADC |
| 中文描述： | 2-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQFP48 |
| 封装： | LEAD FREE, MS-022, LQFP-48 |
| 文件页数： | 28/40页 |
| 文件大小： | 402K |
| 代理商： | CS5346-DQZR |
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34
DS861PP2
CS5346
7.8.2
Analog Input Selection (Bits 2:0)
Function:
These bits are used to select the input source for the PGA and ADC. Please see Table 12.
7.9
Active Level Control - Address 0Ch
7.9.1
Active High/ Low (Bit 0)
Function:
When this bit is set, the INT pin functions as an active high CMOS driver.
When this bit is cleared, the INT pin functions as an active low open drain driver and will require an exter-
nal pull-up resistor for proper operation.
7.10 Status - Address 0Dh
For all bits in this register, a ‘1’ means the associated condition has occurred at least once since the register
was last read. A ‘0’ means the associated condition has NOT occurred since the last reading of the register.
Status bits that are masked off in the associated mask register will always be ‘0’ in this register. This register
defaults to 00h.
PGASoft
PGAZeroCross
Mode
0
Changes to affect immediately
0
1
Zero Cross enabled
1
0
Soft Ramp enabled
1
Soft Ramp and Zero Cross enabled (default)
Table 11. PGA Soft Cross or Zero Cross Mode Selection
Sel2
Sel1
Sel0
PGA/ADC Input
0
Microphone-Level Inputs (+32 dB Gain Enabled)
0
1
Line-Level Input Pair 1
0
1
0
Line-Level Input Pair 2
0
1
Line-Level Input Pair 3
1
0
Line-Level Input Pair 4
1
0
1
Line-Level Input Pair 5
1
0
Line-Level Input Pair 6
1
Reserved
Table 12. Analog Input Multiplexer Selection
76
543
21
0
Reserved
Active_H/L
76
543
21
0
Reserved
ClkErr
Reserved
Ovfl
Undrfl
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相关代理商/技术参数 |
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| CS5349-000 | 制造商:TE Connectivity 功能描述:4110-10-340812 |
| CS5349-BP | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog-to-Digital Converter， 16-Bit |
| CS5349-BS | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog-to-Digital Converter， 16-Bit |
| CS5349-KP | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog-to-Digital Converter， 16-Bit |
| CS5349-KS | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog-to-Digital Converter， 16-Bit |
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