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参数资料
| 型号： | CS5361GD16 |
| 厂商： | ON SEMICONDUCTOR |
| 元件分类： | 稳压器 |
| 英文描述： | 2 A BATTERY CHARGE CONTROLLER, 635 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封装： | SOIC-16 |
| 文件页数： | 2/15页 |
| 文件大小： | 120K |
| 代理商： | CS5361GD16 |
CS5361
http://onsemi.com
1240
selection of external components and allows the user
freedom to choose switching frequency.
Gate Drivers GATE(H) and GATE(L)
In synchronous buck operation, GATE(H) and GATE(L)
drive the high–side P–channel MOSFET and the low–side
N–channel MOSFET respectively. The advantage of this
circuit is that no charge pump is required. The low–side FET
(the synchronous rectifier) behaves like a diode but has a
smaller voltage drop and improves the efficiency. A 60 ns
nonoverlap dead time is added between the time when the
high–side FET is turned off and when the synchronous
rectifier is turned on, and vice versa. This function
effectively prevents crowbar currents during switching
transitions.
Gate Voltage Clamps
Internal clamps prevent driving the external power
MOSFET gate voltages to levels higher than required for
complete enhancement. This improves converter efficiency
by reducing gate rise time, fall time, and the losses
associated with the charge and discharge of gate
capacitance.
Bias Mode
When the battery is fully charged, the charger can be shut
down externally by pulling the ENABLE/UVLO pin low.
When the part is off and the OSC pin is pulled above 2.75 V,
the charger will enter into Bias Mode. In Bias mode, the
high–side PFET turns on and connect the battery to the load
so that the battery starts discharging to the load.
100% Duty Cycle
The maximum duty cycle of the CS5361 is 100%. This
feature is useful when the input voltage is marginally higher
than the output voltage. If the battery voltage is very close
to the input line voltage, the controller will simply go to
100% duty cycle.
Slope Compensation
In both current and voltage controls, the sensed inductor
current signal is used as the ramp of the PWM comparator
to afford fast response to line and load variations. An
artificial ramp signal with negative slope generated by the
oscillator is added to the two negative inputs (VCOMP and
ICOMP) of the PWM comparator to be compared with the
ramp generated by the inductor current. The output of the
PWM comparator is used to control the duty cycle. This
method helps stabilize the system over the whole operation
duty cycle range as well as minimize response time to output
current changes.
Error Amplifier Compensation
The outputs of the Average Current Error Amplifier and
the Voltage Error Amplifier are available to users. Users
have the freedom to design the compensation network to
improve the dynamic characteristics such as transient
response time, over/undershoot, and loop stability.
Enable/Under–Voltage Lockout
The input voltage of the charger must remain above a
certain level in order to work. Control is required to ensure
that the charger will not start to operate without sufficient
voltage. Under–Voltage Lockout provides this protection
with a comparator, which compares the input to 2.5 V. The
output of the comparator enables the charger’s reference
voltage, which in turn controls startup of the charger. The
comparator’s output also controls the high–side MOSFET
so that the batteries will power the load when the charger is
shut off. This pin also provides the function of manual
shutdown by bringing the pin below 2.5 V. Chip current in
the shutdown mode is only 2.0
A.
Peak Current Control
The Peak Current Buffer Amplifier compares the current
control signal (the output of the Average Current Error
Amplifier) with a preset reference voltage, which can be set
externally at pin IPEAK. When output of the Error Amplifier
exceeds the limit, the output of the Peak Current Buffer
Amplifier goes low and clamps current control signal.
Therefore, the peak current control can override the average
current control. In laptop computer systems, fast reducing
the charge current is required to prevent overloading the
input supply when the computer switches into active mode
from sleep mode. On the other hand, a trickle charging mode
is required in many battery chargers either to prevent
over–discharged or fully charged cells from being damaged
by constant–current charging. The current for trickle
charging is usually much lower than that of constant–current
charging. The Peak Current Control can be utilized to
implement trickle charging mode without changing the
setting of the average charging current.
Input Current Limiting
An input current limiting function can be implemented
externally using a dual op–amp, a sense resistor and several
resistors and capacitors. The first op–amp is configured into
a differential amplifier. The second op–amp compares the
amplified input current signal with a reference voltage. The
output is used to clamp the ICOMP pin voltage when input
current exceeds the limit. See Figure 9 for detailed
implementation.
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