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参数资料
| 型号： | CS5361GD16 |
| 厂商： | ON SEMICONDUCTOR |
| 元件分类： | 稳压器 |
| 英文描述： | 2 A BATTERY CHARGE CONTROLLER, 635 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封装： | SOIC-16 |
| 文件页数： | 4/15页 |
| 文件大小： | 120K |
| 代理商： | CS5361GD16 |
CS5361
http://onsemi.com
1242
sheet; several capacitors should be paralleled. The number
of capacitors is determined by:
Number of Capacitors
+
ESRPER CAP
ESRMAX
(56)
3. Design of Resistor Divider for Voltage Sensing
Because the internal reference voltage is 4.2 V, which is
equal to the voltage of one Lithium Ion battery cell, we have:
R2
R1
) R2 +
1.0
Cell Count
The maximum input bias current of the Voltage Error
Amplifier is 1.0
A, the resistor divider current should be
much higher than that to ensure that there is sufficient bias
current. For 4–cell charger, the output voltage is 16.8 V. If
we choose R1 + R2 = 100 k
, then
16.8 V
100 k
W +
168
mA>> 1.0 mA
Therefore,
R2
+ 100 kW
Cell Count
,R1
+ 100 kW * R2
(57)
R1 and R2 must be
± 0.1% precise resistors to meet the
± 1.0% overall charge voltage accuracy.
4. Design of Resistor Divider for Enable/Under–Voltage
Lockout
The resistor divider should be so designed that the
controller can be enabled at the required minimum input
voltage.
R4
R3
) R4 +
2.5 V
VIN,MIN
The maximum bias current for this pin is also 1.0
A. The
sum of R3 and R4 can also be chosen as 100 k
, so
R4
+ 100 kW
2.5 V
VIN,MIN
,R3
+ 100 kW * R4
(58)
5. Selection of Current Sense Resistor and Resistor
Divider for Current Setting
The tolerance of the current sense resistor affects the
accuracy of current regulation, so a sense resistor with
± 1.0%
tolerance should be used. Since the Current Sense Amplifier
is a high–speed, low voltage rail–to–rail amplifier, the value
of the current sensing resistor should satisfy the following
condition:
IPEAK
RSENSE v 125 mV
where 125 mV is the differential mode input range of the
Current Sense Amplifier.
Therefore,
RSENSE v
125 mV
IPEAK
(59)
After the value of current sense resistor is determined, the
resistor divider for current setting can be designed.
R6
R5
) R6 +
IOUT
RSENSE
25
4.2 V
where IOUT is the target value of the output current.
The maximum bias current of the Current Error Amplifier
is 1.0 mA. The voltage across the resistor divider is 4.2 V. If
we choose R5 + R6 = 10 k
, we have
42
10 k
W +
420
mA>> 1.0 mA
Therefore,
R6
+ 10 kW
25
IOUT
RSENSE
4.2 V
,
R5
+ 10 kW * R6
(60)
6. Design of Average Current Compensation Network
As mentioned before, there are two feedback loops in the
I2 control scheme. The slow outer loop provides tight
regulation and easy loop compensation. The fast inner loop
handles the transient response on a pulse–by–pulse basis.
The design of the compensation network is based on the
control–to–output transfer function with closed inner
current feedback loop. In this case, “control” is the output of
the Average Current Error Amplifier (ICOMP) and “output”
is the inductor current.
The approximate control–to–output transfer function for
the Buck converter is given by:
IL
ICOMP
[
1.0
) sC
(ESR
) R)
RI(1.0 ) sCR) 1.0 ) s (wnQ) ) s2 wn2
(61)
where RI is the current sense gain, ωn is half of the switching
frequency and
Q
+
1.0
p[(1.0 ) Se Sn)
(1.0
* D) * 0.5]
(62)
where Se is the slope of the external ramp signal and Sn is
the inductor current up slope.
The transfer function is a third–order system with a double
pole at half of the switching frequency and a low frequency
pole. Because ESR of the output capacitor is usually very
small compared to load resistor R, the zero and the low
frequency pole can cancel out each other. The system
degrades to second–order.
The compensation design for such a system becomes very
easy. A single integrator pole gives the system high DC gain
and makes it crossover with –1.0 slope. The Bode plot of the
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