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| 型号： | CS5463-ISZ |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 30/46页 |
| 文件大小： | 0K |
| 描述： | IC ENERGY METERING 1PHASE 24SSOP |
| 特色产品： | CS546X IC Family |
| 标准包装： | 59 |
| 输入阻抗： | 30 千欧 |
| 测量误差： | 0.1% |
| 电压 - 高输入/输出： | 0.8V |
| 电压 - 低输入/输出： | 0.2V |
| 电流 - 电源： | 2.9mA |
| 电源电压： | 4.75 V ~ 5.25 V |
| 测量仪表类型： | 单相 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 24-SSOP |
| 包装： | 管件 |
| 产品目录页面： | 754 (CN2011-ZH PDF) |
| 配用： | 598-1553-ND - BOARD EVAL & SOFTWARE CS5463 ADC |
| 其它名称： | 598-1096-5 |
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CS5463
lates due to an input above full scale. The level at which the modulator oscillates is significantly
higher than the voltage channel’s differential input voltage (current) range.
Note: The IOD and VOD bits may be ‘falsely’ triggered by very brief voltage spikes from the
power line. This event should not be confused with a DC overload situation at the inputs,
when the IOD and VOD bits will re-assert themselves even after being cleared, multiple
times.
LSD
FUP
IC
Low Supply Detect. Set when the voltage at the PFMON pin falls below the low-voltage thresh-
old (PMLO), with respect to AGND pin. The LSD bit cannot be reset until the voltage at PFMON
pin rises back above the high-voltage threshold (PMHI).
Epsilon Updated. Indicates completion of a line frequency measurement and update of Epsilon.
Invalid Command. Normally logic 1. Set to logic 0 if an invalid command is received or the Sta-
tus Register has not been successfully read.
6.1.12 Current and Voltage AC Offset Register ( V ACoff , I ACoff )
Address: 16 (Current AC Offset); 17 (Voltage AC Offset)
MSB
LSB
-(2 0 )
2 -1
2 -2
2 -3
2 -4
2 -5
2 -6
2 -7
.....
2 -17
2 -18
2 -19
2 -20
2 -21
2 -22
2 -23
Default = 0x000000
The AC Offset Registers (V ACoff , I ACoff ) are initialized to zero on reset, allowing for uncalibrated normal operation.
AC Offset Calibration updates these registers. This sequence lasts approximately (6N + 30) ADC cycles (where
N is the value of the Cycle Count Register ). DRDY will be asserted at the end of the calibration. These values
may be read and stored for future system AC offset compensation. The value is represented in two's comple-
ment notation in the range of -1.0 ? V ACoff , I ACoff ? 1.0, with the binary point to the right of the MSB
6.1.13 Operational Mode Register ( Mode )
Address: 18
23
15
22
14
21
13
20
12
19
11
18
10
17
9
16
8
E2MODE
XVDEL
7
XIDEL
6
IHPF
5
VHPF
4
IIR
3
E3MODE1
2
E3MODE0
1
POS
0
AFC
Default = 0x000000
30
E2MODE
XVDEL
XIDEL
E2 Output Mode
0 = Energy Sign (default)
1 = Apparent Power
Enables an extra sample of voltage channel delay. XVDEL and XIDEL can not be enabled at
the same time.
Enables an extra sample of current channel delay. XVDEL and XIDEL can not be enabled at
the same time.
DS678F3
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CS5463-ISZ/D | 制造商:Cirrus Logic 功能描述: |
| CS5463-ISZR | 功能描述:电流和电力监控器、调节器 IC Single Phase PWR/Energy RoHS:否 制造商:STMicroelectronics 产品:Current Regulators 电源电压-最大:48 V 电源电压-最小:5.5 V 工作温度范围:- 40 C to + 150 C 安装风格:SMD/SMT 封装 / 箱体:HPSO-8 封装:Reel |
| CS5463-ISZR/E2 | 制造商:Cirrus Logic 功能描述: |
| CS5464 | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:Three-channel, Single-phase Power/Energy IC |
| CS5464_07 | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:Three-channel, Single-phase Power/Energy IC |
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