- 您现在的位置：买卖IC网 > PDF目录10681 > CS5525-ASZ (Cirrus Logic Inc)IC ADC 16BIT W/4BIT LATCH 20SSOP PDF资料下载
参数资料
| 型号： | CS5525-ASZ |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 7/30页 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT W/4BIT LATCH 20SSOP |
| 标准包装： | 66 |
| 位数： | 16 |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 12.7mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 20-SSOP |
| 包装： | 管件 |
| 输入数目和类型： | 1 个差分，单极；1 个差分，双极 |
| 产品目录页面： | 755 (CN2011-ZH PDF) |
| 配用： | 598-1013-ND - EVAL BOARD FOR CS5525 |
| 其它名称： | 598-1107-5 |
第1页第2页第3页第4页第5页第6页当前第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页
CS5525 CS5526
DS202F5
15
differential output voltage from the amplifier ex-
ceeds 2.8 V, the amplifier may saturate, which will
cause a measurement error.
The input voltage into the modulator must not
cause the modulator to exceed a low of 20 percent
or a high of 80 percent 1's density. The nominal full
scale input span of the modulator (from 30 percent
to 70 percent 1’s density) is determined by the
VREF voltage divided by the Gain Factor. See Ta-
ble 3 to determine if the CS5525/26 are being used
properly. For example, in the 55 mV range to de-
termine the nominal input voltage to the modulator,
divide VREF (2.5 V) by the Gain Factor (2.2727).
When a smaller voltage reference is used, the re-
sulting code widths are smaller causing the con-
verter output codes to exhibit more changing codes
for a fixed amount of noise. Table 3 is based upon
a VREF = 2.5 V. For other values of VREF, the val-
ues in Table 3 must be scaled accordingly.
AIN and VREF pins. The dynamic input current for
each of the pins can be determined from the models
shown and is dependent upon the setting of the CFS
(Chop Frequency Select) bit. The effective input
impedance for the AIN+ and AIN- pins remains
constant for the three low level measurement rang-
es (25 mV, 55 mV, and 100 mV). The input current
is lowest with the CFS bit cleared to logic 0.
Note: Residual noise appears in the converter’s baseband for
output word rates greater than 60 Sps if CFS is logic 0. By set-
ting CFS to logic 1, the amplifier’s chop frequency chops at
32768 Hz eliminating the residual noise, but increasing the
current. Note that C=48pF is for input current modeling only.
For physical input capacitance see ‘Input Capacitance’ spec-
ification under ‘Analog Characteristics’ on page 3.
Note:
1. The converter's actual input range, the delta-sigma's nominal full scale input, and the delta-sigma's
maximum full scale input all scale directly with the value of the voltage reference. The values in the
table assume a 2.5 V VREF voltage.
Input Range(1)
Max. Differential Output
20X Amplifier
VREF
Gain Factor
-Σ Nominal(1)
Differential Input
-Σ(1)
Max. Input
± 25 mV
2.8 V (2)
2.5V
5
± 0.5 V
± 0.75 V
± 55 mV
2.8 V (2)
2.5V
2.272727...
± 1.1 V
± 1.65 V
± 100 mV
2.8 V (2)
2.5V
1.25
± 2.0 V
± 3.0 V
± 1.0 V
-
2.5V
2.5
± 1.0 V
± 1.5 V
± 2.5 V
-
2.5V
1.0
± 2.5 V
± 5.0 V
-
2.5V
0.5
± 5.0 V
0V, VA+
Table 3. Relationship between Full Scale Input, Gain Factors, and Internal Analog Signal Limitations
AIN
25m V , 55m V , and 100m V R anges
V
≤ 25m V
i = fV
C
os
n
C = 48pF
C F S = 0 , f = 2 5 6 H z
C F S = 1 , f = 3 2 .7 6 8 kH z
AIN +
1V , 2 .5 V , and 5V R a nges
C = 32pF
i = [(V
) - (V
)] fC
n
AIN +
A IN -
AIN -
f = 32.768 kH z
Figure 8. Input models for AIN+ and AIN- pins
VR E F +
C = 16pF
VR E F -
i
= [(V R E F + ) - (V R E F -)] fC
n
f = 32.768 k H z
Figure 9. Input model for VREF+ and VREF- pins.
相关PDF资料 |
PDF描述 |
|---|---|
| LT1715IMS#TR | IC COMPARATOR 150MHZ DUAL 10MSOP |
| AD8612ARUZ-REEL | IC COMP DUAL 4NS FAST 14-TSSOP |
| AD9609BCPZ-40 | IC ADC 10BIT 40MSPS LP 32LFCSP |
| AD7276BUJZ-500RL7 | IC ADC 12BIT 3MSPS TSOT23-6 |
| LT1720IMS8#PBF | IC COMPARATOR DUAL HS 3/5V 8MSOP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CS5525-ASZR | 功能描述:模数转换器 - ADC IC 16Bit Delta Sigma Multi-Range ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| CS5525-BP | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:16 BIT / 20 BIT MULTI RANGE ADC WITH 4 BIT LATCH |
| CS5525-BS | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:16 BIT / 20 BIT MULTI RANGE ADC WITH 4 BIT LATCH |
| CS5526 | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:16 BIT / 20 BIT MULTI RANGE ADC WITH 4 BIT LATCH |
| CS5526-000 | 制造商:TE Connectivity 功能描述:S200-1-01 - Bulk |
发布紧急采购，3分钟左右您将得到回复。