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参数资料
| 型号： | CS5529-ASZ |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 10/31页 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT W/6BIT LATCH 20SSOP |
| 标准包装： | 66 |
| 位数： | 16 |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 3.5mW |
| 电压电源： | 模拟和数字，双 ± |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 20-SSOP |
| 包装： | 管件 |
| 输入数目和类型： | 1 个差分，单极；1 个差分，双极 |
| 产品目录页面： | 755 (CN2011-ZH PDF) |
| 配用： | 598-1015-ND - EVAL BOARD FOR CS5529 |
| 其它名称： | 598-1110-5 |
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CS5529
18
DS246F5
Gain Register
The gain register span is from 0 to (4-2-22). After Reset the (MSB-1) bit is ‘1’, all other bits are ‘0’.
The gain calibration results is stored in the gain
register. The result sets the slope of the ADC’s
transfer function. The gain register spans from 0 to
(4 - 2-22). The decimal equivalent meaning of the
gain register is
where the binary numbers have a value of either
zero or one (b0 corresponds to bit MSB-1, N = 22).
Self Calibration
The CS5529 offers both self offset and self gain
calibrations. For the self-calibration of offset, the
converter internally ties the inputs of the modulator
together and routes them to the VREF- pin as
shown in Figure 6. Also self offset calibration re-
quires that VREF- be tied to a fixed voltage be-
tween VA+ and VA-. For self-calibration of gain,
the differential inputs of the modulator are connect-
ed to VREF+ and VREF- as shown in Figure7.
System Calibration
For the system calibration functions, the user must
input signals which represent system ground and
system full scale to the converter. When a system
offset calibration is performed a ground reference
signal must be applied to the converter (see Figure
8). When a system gain calibration is performed,
the user must input a signal representing the posi-
tive full scale point as shown in Figure 9. In either
case, calibration signals must be within the speci-
fied calibration limits for each specific calibration
step (refer to the System Calibration Specifica-
23(MSB)
22
21
20
19
18
17
16
15
14
13
12
21
20
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
0
00000
0
11
10
9876
5
4
3
2
1
0
2-11
2-12
2-13
2-14
2-15
2-16
2-17
2-18
2-19
2-20
2-21
2-22
0
00000
0
Db
MSB
2
1
b
(
0
2
0
b
1
2
1
–
… b
N
2
N
– )
++
+
b
MSB
2
1
b
i
2
i
–
i
0
=
N
∑
+
==
AIN+
AIN-
S1
OPEN
+
-
S2
OPEN
S4
CLOSED
VREF-
S3
CL
O
SED
Figure 6. Self Calibration of Offset.
AIN+
AIN-
OPEN
+
-
OPEN
CLOSED
VREF+
CLOSED
VREF-
+
-
Reference
Figure 7. Self Calibration of Gain.
+
-
External
Connections
0V +
-
AIN+
AIN-
Figure 8. System Calibration of Offset.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CS5529-ASZR | 功能描述:模数转换器 - ADC IC Prgrmbl Dlt Sigma ADC w/6-Bit Latch RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| CS5530 | 制造商:Texas Instruments 功能描述: |
| CS5530_0911 | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:24-bit ADC with Ultra-low-noise Amplifier |
| CS5530A | 制造商:AMD 制造商全称:Advanced Micro Devices 功能描述:AMD Geode CS5530A Companion Device |
| CS5530A-UCE | 制造商:AMD 制造商全称:Advanced Micro Devices 功能描述:AMD Geode CS5530A Companion Device |
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