参数资料
型号: CS5533-ASZ
厂商: Cirrus Logic Inc
文件页数: 6/43页
文件大小: 0K
描述: IC ADC 16BIT PGIA 2-CH 24-SSOP
标准包装: 59
位数: 16
采样率(每秒): 3.84k
数据接口: 串行
转换器数目: 1
功率耗散(最大): 45mW
电压电源: 模拟和数字,双 ±
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.209",5.30mm 宽)
供应商设备封装: 24-SSOP
包装: 管件
输入数目和类型: 4 个差分,单极;4 个差分,双极
产品目录页面: 755 (CN2011-ZH PDF)
其它名称: 598-1114-5
CS5531/32/33/34-AS
14
DS289F5
2.1.4. No Offset DAC
An offset DAC was not included in the CS553X
family because the high dynamic range of the con-
verter eliminates the need for one. The offset regis-
ter can be manipulated by the user to mimic the
function of a DAC if desired.
2.2. Overview of ADC Register Structure
and Operating Modes
The CS5531/32/33/34 ADCs have an on-chip con-
troller, which includes a number of user-accessible
registers. The registers are used to hold offset and
gain calibration results, configure the chip's operat-
ing modes, hold conversion instructions, and to
store conversion data words. Figure 6 depicts a
block diagram of the on-chip controller’s internal
registers.
Each of the converters has 32-bit registers to func-
tion as offset and gain calibration registers for each
channel. The converters with two channels have
two offset and two gain calibration registers, the
converters with four channels have four offset and
four gain calibration registers. These registers hold
calibration results. The contents of these registers
can be read or written by the user. This allows cal-
ibration data to be off-loaded into an external EE-
PROM. The user can also manipulate the contents
of these registers to modify the offset or the gain
slope of the converter.
The converters include a 32-bit configuration reg-
ister which is used for setting options such as the
power down modes, resetting the converter, short-
ing the analog inputs, and enabling diagnostic test
bits like the guard signal.
A group of registers, called Channel Setup Regis-
ters, are used to hold pre-loaded conversion in-
structions. Each channel setup register is 32 bits
long, and holds two 16-bit conversion instructions
referred to as Setups. Upon power up, these regis-
ters can be initialized by the system microcontrol-
ler with conversion instructions. The user can then
Offset 1(1x 32)
Offset 2 (1 x 32)
Offset 3 (1 x 32)
Offset 4 (1 x 32)
Gain 1 (1 x 32)
Gain 2 (1 x 32)
Gain 3 (1 x 32)
Gain 4 (1 x 32)
Setup 1
(1 x 16)
Setup 2
(1 x 16)
Setup 4
(1 x 16)
Setup 6
(1 x 16)
Setup 8
(1 x 16)
Setup 3
(1 x 16)
Setup 5
(1 x 16)
Setup 7
(1 x 16)
Offset Registers (4 x 32)
Gain Registers (4 x 32)
Channel Setup
Registers (4 x 32)
Conversion Data
Register (1 x 32)
Configuration Register (1 x 32)
Power Save Select
Reset System
Input Short
Guard Signal
Voltage Reference Select
Output Latch
Output Latch Select
Channel Select
Gain
Word Rate
Unipolar/Bipolar
Output Latch
Delay Time
Open Circuit Detect
CS
SDI
SDO
SCLK
Read
O
n
ly
Com mand
Register (1 × 8)
Wr
it
e
O
n
ly
Serial
Interface
Data (1 x 32)
Offset/Gain Select
Filter Rate Select
Offset/Gain Pointer
Figure 6. CS5531/32/33/34 Register Diagram
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相关代理商/技术参数
参数描述
CS5533-ASZ/H1 制造商:Cirrus Logic 功能描述:
CS5533-ASZR 功能描述:模数转换器 - ADC IC 16-Bit ADCs w/UltraLw Noise PGIA RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32
CS5534 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:16 BIT AND 24 BIT ADCS WITH ULTRA LOW NOISE PGIA
CS5534-AS 功能描述:模数转换器 - ADC 4-Ch 24-Bit ADCs w/ Ultra Low Noise PGIA RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32
CS5534-ASR 功能描述:模数转换器 - ADC IC 24-Bit ADCs w/UltraLw Noise PGIA RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32