参数资料
型号: DAC8564IAPWG4
厂商: TEXAS INSTRUMENTS INC
元件分类: DAC
英文描述: SERIAL INPUT LOADING, 12 us SETTLING TIME, 16-BIT DAC, PDSO16
封装: GREEN, PLASTIC, TSSOP-16
文件页数: 24/51页
文件大小: 1549K
代理商: DAC8564IAPWG4
SBAS403D
– JUNE 2007 – REVISED MAY 2011
LD1 (DB21) and LD0 (DB20) control the loading of
DB21 = 0 and DB20 = 1: Single-channel update.
each analog output with the specified 16-bit data
The data buffer and DAC register corresponding to a
value or power-down command. Bit DB19 must
DAC selected by DB18 and DB17 update with the
always be '0'. The DAC channel select bits (DB18,
contents of SR data (or power-down).
DB17)
control
the
destination
of
the
data
(or
DB21 = 1 and DB20 = 0: Simultaneous update. A
power-down command) from DAC A through DAC D.
channel selected by DB18 and DB17 updates with
The final control bit, PD0 (DB16), selects the
the SR data; simultaneously, all the other channels
power-down mode of the DAC8564 channels as well
update with previously stored data (or power-down)
as the power-down mode of the internal reference.
from data buffers.
The DAC8564 supports a number of different load
DB21 = 1 and DB20 = 1: Broadcast update. All the
commands. The load commands include broadcast
DAC8564s on the SPI bus respond, regardless of
commands to address all the DAC8564s on an SPI
address matching. If DB18 = 0, SR data are ignored
bus. The load commands are summarized as follows:
and any channels from all DAC8564s update with
previously stored data (or power-down). If DB18 = 1,
DB21 = 0 and DB20 = 0: Single-channel store. The
SR data (or power-down) update any channels of all
data buffer corresponding to a DAC selected by
DAC8564s in the system. This broadcast update
DB18 and DB17 updates with the contents of SR
feature allows the simultaneous update of up to 16
data (or power-down).
channels.
Refer to Table 5 for more information.
Table 5. Control Matrix for the DAC8564
DB23
DB22
DB21
DB20
DB19
DB18
DB17
DB16
DB15
DB14
DB13-DB0
A1
A0
LD 1
LD 0
0
DAC Sel 1
DAC Sel 0
PD0
MSB
MSB-1
MSB-2...LSB
(Address Select)
DESCRIPTION
This address selects one of four possible devices on a
0/1
See Below
single SPI data bus based on the address pin(s) state
of each device.
0
Data
Write to buffer A with data
0
1
0
Data
Write to buffer B with data
0
1
0
Data
Write to buffer C with data
0
1
0
Data
Write to buffer D with data
Write to buffer (selected by DB17 and DB18) with
0
(00, 01, 10, or 11)
1
0
power-down command
A0 and A1 should
correspond to the
Write to buffer with data and load DAC (selected by
0
1
0
(00, 01, 10, or 11)
0
Data
package address
DB17 and DB18)
set via pins 13
Write to buffer with power-down command and load
and 14
0
1
0
(00, 01, 10, or 11)
1
0
DAC (selected by DB17 and DB18)
Write to buffer with data (selected by DB17 and DB18)
1
0
(00, 01, 10, or 11)
0
Data
and then load all DACs simultaneously from their
corresponding buffers
Write to buffer with power-down command (selected by
1
0
(00, 01, 10, or 11)
1
0
DB17 and DB18) and then load all DACs
simultaneously from their corresponding buffers
Broadcast Modes
Simultaneously update all channels of all DAC8564
X
1
0
X
devices in the system with data stored in each
channels data buffer
X
1
0
1
X
0
Data
Write to all devices and load all DACs with SR data
Write to all devices and load all DACs with power-down
X
1
0
1
X
1
0
command in SR
30
Copyright
2007–2011, Texas Instruments Incorporated
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