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参数资料
| 型号： | DC1669A |
| 厂商： | Linear Technology |
| 文件页数： | 17/32页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL LTM4627 |
| 软件下载： | LTM4627 Spice Model |
| 设计资源： | LTM4627 Gerber Files DC1669A Design Files |
| 标准包装： | 1 |
| 系列： | LTM®, uModule® |
| 主要目的： | DC/DC，步升 |
| 输出及类型： | 1，非隔离 |
| 输出电压： | 1V，1.2V，1.5V，1.8V，2.5V，3.3V |
| 电流 - 输出： | 15A |
| 输入电压： | 4.5 ~ 20 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 500kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | LTM4627 |
| 相关产品： | LTM4627IV#PBF-ND - IC UMODULE DC/DC 15A 133LGA LTM4627EV#PBF-ND - IC UMODULE DC/DC 15A 133LGA |
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LTM4627
APPLICATIONS INFORMATION
Thermal Considerations and Output Current Derating
The thermal resistances reported in the Pin Configura-
tion section of the data sheet are consistent with those
parameters defined by JESD 51-12 and are intended for
use with finite element analysis (FEA) software modeling
tools that leverage the outcome of thermal modeling, simu-
lation, and correlation to hardware evaluation performed
on a μModule package mounted to a hardware test board
defined by JESD 51-9 (“Test Boards for Area Array Surface
Mount Package Thermal Measurements”). The motiva-
tion for providing these thermal coefficients is found in
JESD 51-12 (“Guidelines for Reporting and Using Electronic
Package Thermal Information”).
Many designers, in lieu of or to compliment any FEA ac-
tivities, may opt to use laboratory equipment and a test
vehicle such as the demo board to anticipate the μModule
regulator’s thermal performance in their application at
various electrical and environmental operating conditions.
Without FEA software, the thermal resistances reported in
the Pin Configuration section are in-and-of themselves not
relevant to providing guidance of thermal performance;
instead, the derating curves provided later in this data sheet
can be used in a manner that yields insight and guidance
pertaining to one’s application-usage, and can be adapted
to correlate thermal performance to one’s own application.
The Pin Configuration section gives four thermal coeffi-
cients explicitly defined in JESD 51-12; these coefficients
are quoted or paraphrased below:
1 θ JA , the thermal resistance from junction to ambient, is
the natural convection junction-to-ambient air thermal
resistance measured in a one cubic foot sealed enclo-
sure. This environment is sometimes referred to as “still
air” although natural convection causes the air to move.
This value is determined with the part mounted to a
JESD 51-9 defined test board, which does not reflect
an actual application or viable operating condition.
2 θ JCbottom , the thermal resistance from junction to the
bottom of the product case, is determined with all of
the component power dissipation flowing through the
bottom of the package. In the typical μModule regulator,
the bulk of the heat flows out the bottom of the pack-
age, but there is always heat flow out into the ambient
environment. As a result, this thermal resistance value
may be useful for comparing packages but the test
conditions don’t generally match the user’s application.
3 θ JCtop , the thermal resistance from junction to top of
the product case, is determined with nearly all of the
component power dissipation flowing through the top of
the package. As the electrical connections of the typical
μModule regulator are on the bottom of the package, it
is rare for an application to operate such that most of
the heat flows from the junction to the top of the part.
As in the case of θ JCbottom , this value may be useful
for comparing packages but the test conditions don’t
generally match the user’s application.
4 θ JB , the thermal resistance from junction to the printed
circuit board, is the junction-to-board thermal resis-
tance where almost all of the heat flows through the
bottom of the μModule package and into the board,
and is really the sum of the θ JCbottom and the thermal
resistance of the bottom of the part through the solder
joints and through a portion of the board. The board
temperature is measured at a specified distance from
the package, using a two sided, two layer board. This
board is described in JESD 51-9.
A graphical representation of the aforementioned ther-
mal resistances is given in Figure 6; blue resistances are
contained within the μModule regulator, whereas green
resistances are external to the μModule package.
As a practical matter, it should be clear to the reader that
no individual or sub-group of the four thermal resistance
parameters defined by JESD 51-12 or provided in the
Pin Configuration section replicates or conveys normal
operating conditions of a μModule regulator. For example,
in normal board-mounted applications, never does 100%
of the device’s total power loss (heat) thermally conduct
exclusively through the top or exclusively through bot-
tom of the μModule package—as the standard defines
for θ JCtop and θ JCbottom , respectively. In practice, power
loss is thermally dissipated in both directions away from
the package—granted, in the absence of a heat sink and
airflow, a majority of the heat flow is into the board.
4627fc
For more information www.linear.com/LTM4627
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