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| 型号： | DK-DEV-2AGX260N |
| 厂商： | Altera |
| 文件页数： | 25/48页 |
| 文件大小： | 0K |
| 描述： | KIT DEV FPGA 2AGX260 W/6.375G TX |
| 产品培训模块： | Three Reasons to Use FPGA's in Industrial Designs |
| 标准包装： | 1 |
| 系列： | Arria II GX |
| 类型： | FPGA |
| 适用于相关产品： | EP2AGX260 |
| 所含物品： | 板，线缆，CD，DVD，电源 |
| 产品目录页面： | 605 (CN2011-ZH PDF) |
| 其它名称： | 544-2696 |
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Chapter 6: Board Test System
Using the Board Test System
■
■
6–5
MAX II ver —Indicates the version of MAX II code currently running on the board.
The MAX II code resides in the <install
dir> \kits\arriaIIGX_2agx260_fpga\examples directory. Newer revisions of this
page of the Altera website.
MAC —Indicates the MAC address of the board.
MAX II Registers
The MAX II registers control allow you to view and change the current MAX II
register values as described in Table 6–1 . Changes to the register values with the GUI
take effect immediately. For example, selecting a new frequency in the OCR1 list
immediately changes the clock frequency on the board.
Table 6–1. MAX II Registers
Register Name
System Reset
(SRST)
Page Select Register
(PSR)
Page Select Override
(PSO)
Read/Write
Capability
Write only
Read / Write
Read / Write
Description
Set to 0 to initiate an FPGA reconfiguration.
Determines which of the up to eight (0-7) pages of flash
memory to use for FPGA reconfiguration. The flash memory
ships with pages 0 and 1 preconfigured.
When set to 0, the value in PSR determines the page of
flash memory to use for FPGA reconfiguration. When set to
1, the value in PSS determines the page of flash memory to
use for FPGA reconfiguration.
Holds the current value of the iluminated CONFIG LED (D11-
D13) based on the following encoding:
0 = CONFIG LED (D13)and corresponds to the flash
■
Page Select Switch
(PSS)
Read only
■
memory page for the factory hardware design
1 = CONFIG LED (D12)and corresponds to the flash
memory page for the user hardware 1 design
■
2 = CONFIG LED (D11)and corresponds to the flash
memory page for the user hardware 2 design
Determines the U26 oscillator output frequency based on
the following options:
Oscillator Control
Register 1 (OCR1)
Read / Write
■
■
■
■
0 = 100 MHz
1 = 125 MHz
2 = 150 MHz
3 = 156.25 MHz
Determines the U30 oscillator output frequency based on
the following options:
■
0 = 100 MHz
Oscillator Control
Register 2 (OCR2)
Read / Write
■
■
■
1 = 125 MHz
2 = 150 MHz
3 = 156.25 MHz
You cannot change OCR2 from the GUI.
July 2010 Altera Corporation
Arria II GX FPGA Development Kit, 6G Edition User Guide
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