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参数资料
| 型号： | DS1023S-50/T&R |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 14/16页 |
| 文件大小： | 0K |
| 描述： | IC DELAY LINE 256TAP 16-SOIC |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 1,000 |
| 标片/步级数： | 256 |
| 功能： | 单发射，可编程 |
| 延迟到第一抽头： | 16.5ns |
| 接头增量： | 0.5ns |
| 可用的总延迟： | 127.5ns |
| 独立延迟数： | 1 |
| 电源电压： | 4.75 V ~ 5.25 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 16-SOIC W |
| 包装： | 带卷 (TR) |
DS1023
7 of 16
DELAY LINE DETAIL (CONCEPTUAL) - DS1023-25, DS1023-50, DS1023-100
Figure 7
PART NUMBER TABLE Table 1
DELAYS RANGES AND TOLERANCE (all times measured in ns)
PART
NUMBER
STEP
SIZE
MAX. DELAY TIME (1)/
MAX. OUTPUT PULSE
WIDTH (2)
MAXIMUM
DEVIATION (3)
MAXIMUM
I/P FREQ
MINIMUM I/P
PULSE
WIDTH
DS1023-25
0.25
63.75
±1
25 MHz
20
DS1023-50
0.50
127.5
±2
25 MHz
20
DS1023-100
1.0
255
±4
25 MHz
20
DS1023-200
2.0
510
±8
25 MHz
20
DS1023-500
5.0
1275
±20
10 MHz
50
1. In “Normal” mode (MS=0). Measured with respect to REF output. The minimum delay time is zero
(or less, by 1.5 ns typically)
2. In PWM mode (MS=1). The minimum output pulse width for reliable operation is 5 ns; programmed
values less than this may produce reduced output voltage levels or no output at all.
3. This is the deviation from a straight line drawn between the step zero value and the maximum
programmed delay time.
OSCILLATOR CONFIGURATION Table 2
PART NUMBER
STEP
SIZE (4)
MINIMUM O/P
FREQUENCY (5)
MAXIMUM O/P
FREQUENCY (5)
DS1023-25
0.5
6.6 MHz
22 MHz
DS1023-50
1.0
3.6 MHz
22 MHz
DS1023-100
2.0
1.9 MHz
22 MHz
DS1023-200
4.0
0.98 MHz
22 MHz
DS1023-500
10.0
0.4 MHz
22 MHz
4. Step size in output period (in ns).
5. Maximum output frequency depends on the actual step zero delay value, worst case values are shown
in the table. The output period is given by: 2 * tD where: tD = absolute delay value.
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