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参数资料
| 型号： | DS1236A |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | MicroManager Chip(微管理器芯片) |
| 中文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDIP16 |
| 封装： | 0.300 INCH, DIP-16 |
| 文件页数： | 9/19页 |
| 文件大小： | 209K |
| 代理商： | DS1236A |
DS1236A
022698 9/19
When the RC pin is tied to ground, the DS1236A is de-
signed to interface with NMOS processors which do not
have the microamp currents required during a battery
backed mode. Grounding the RC pin does, however,
continue to support nonvolatile backup of system
SRAM memory. Nonvolatile systems incorporating
NMOS processors generally require that only the
SRAM memory and/or timekeeping functions be battery
backed. When the processor is not battery backed (RC
= 0), all signals connected from the processor to the
DS1236A are disconnected from the backup battery
supply, or grounded when system V
CC
decays below
V
BAT
. In the NMOS processor system, the principal em-
phasis is placed on giving early warnings with NMI, then
providing a continuously active RST and RST signal
during power-down while isolating the backup battery
from the processor during a loss of V
CC
.
During power-down, NMI will pulse low for a minimum of
200
μ
s, and then return high. If RC is tied low (NMOS
mode), the voltage on NMI will follow V
CC
until V
CC
sup-
ply decays to V
BAT
, at which point NMI will enter tri-state
(see timing diagram). Also, upon V
CC
out-of-tolerance
at V
CCTP
, the RST and RST outputs are driven active
and RST will follow V
CC
as the supply decays. On pow-
er-up, RST follows V
CC
up, RST is held low, and both re-
main active for t
RST
after valid V
CC
. During a power-up
from a V
CC
voltage below V
BAT
, any detected IN pin lev-
els below V
TP
are disabled from reaching the NMI pin
until V
CC
rises to V
CCTP
. As a result, any potential NMI
pulse will not be initiated until V
CC
reaches V
CCTP
. Re-
moval of an active low level on the NMI pin is controlled
by either an internal time-out (when the IN pin is less
than V
TP
), or by the subsequent rise of the IN pin above
V
TP
. The initiation and removal of the NMI signal results
in an NMI pulse of 0
μ
s minimum to 500
μ
s maximum
during power-up, depending on the relative voltage rela-
tionship between V
CC
and the IN pin. As an example,
when the IN pin is tied to ground, the internal time-out
will result in a pulse of 200
μ
s minimum to 500
μ
s maxi-
mum. In contrast, if the IN pin is tied to V
CCO
, NMI will
not produce a pulse on power-up.
Connecting the RC pin to a high (V
CCO
) invokes CMOS
mode and provides nonvolatile support to both the sys-
tem SRAM as well as a low power CMOS processor.
When using CMOS microprocessors, it is possible to
place the microprocessor into a very low- power mode
termed the “stop” or “halt” mode. In this state the CMOS
processor requires only microamp currents and is fully
capable of being battery backed. This mode generally
allows the CMOS microprocessor to maintain the con-
tents of internal RAM as well as state control of I/O ports
during battery backup. The processor can subsequently
be restarted by any of several different signals. To main-
tain this low-power state, the DS1236A issues no NMI
and/or reset signals to the processor until it is time to
bring the processor back into full operation. To support
the low-power processor battery backed mode (RC = 1),
the DS1236A provides a pulsed NMI for early power fail-
ure warning. Waiting to initiate a Stop mode until after
the NMI pin has returned high will guarantee the proces-
sor that no other active NMI or RST/RST will be issued
by the DS1236A until one of two conditions occurs: 1)
Voltage on the pin rises above V
TP
, which activates the
watchdog, or 2) V
CC
cycles below then above V
BAT
,
which also results in an active RST and RST. If V
CC
does not fall below V
CCTP
, the processor will be re-
started by the reset derived from the watchdog timer as
the IN pin rises above V
TP
.
With the RC pin tied to V
CCO
, RST and RST are not
forced active as V
CC
collapses to V
CCTP
. The RST is
held at a high level via the external battery as V
CC
falls
below battery potential. This mode of operation is in-
tended for applications in which the processor is made
nonvolatile with an external source, and allows the pro-
cessor to power down into a Stop mode as signaled
from NMI at an earlier voltage level. The NMI output pin
will pulse low for t
NMI
following a low voltage detect at
the IN pin of V
TP
. Following t
NMI
, however, NMI will also
be held at a high level (V
BAT
) by the battery as V
CC
de-
cays below V
BAT
. On power-up, RST and RST are held
inactive until V
CC
reaches V
BAT
, then RST and RST are
driven active for t
RST
. If the IN pin falls below V
TP
during
an active reset, the reset outputs will be forced inactive
by the NMI output. In addition, as long as the IN pin is
less than V
TP
, stimulation of the ST pin will result in addi-
tional NMI pulses. In this way, the ST pin can be used to
allow the CMOS processor to determine if the supply
voltage, as monitored by the IN pin, is above or below a
selected operating value. This is illustrated in NO TAG.
As discussed above, the RC pin determines the timing
relationships and levels of several signals. The follow-
ing section describes the power-up and power-down
timing diagrams in more detail.
TIMING DIAGRAMS
This section provides a description of the timing dia-
grams shown in Figure 9, Figure 10, Figure 11, and Fig-
ure 12. These diagrams show the relative timing and
levels in both the NMOS and the CMOS mode for pow-
er-up and down. Figure 9 illustrates the relationship for
相关PDF资料 |
PDF描述 |
|---|---|
| DS1236 | MicroManager Chip(微管理器芯片) |
| DS1238A | MicroManager(微管理器芯片) |
| DS1238 | MicroManager(微管理器芯片) |
| DS1239 | MicroManager Chip(微管理器芯片) |
| DS1250AB | 4096K Nonvolatile SRAM(4096K 非易失性静态RAM) |
相关代理商/技术参数 |
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| DS1236A-10 | 功能描述:监控电路 RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| DS1236A-10+ | 功能描述:监控电路 RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| DS1236A-10N | 功能描述:监控电路 RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| DS1236A-10N+ | 功能描述:监控电路 RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| DS1236A-5 | 功能描述:监控电路 RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
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