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参数资料
| 型号： | DS1265Y |
| 厂商： | Maxim Integrated Products, Inc. |
| 英文描述： | 8M Nonvolatile SRAM(8M非易失性静态RAM) |
| 中文描述： | 8M非易失SRAM |
| 文件页数： | 2/8页 |
| 文件大小： | 65K |
| 代理商： | DS1265Y |
DS1265Y/AB
060598 2/8
READ MODE
The DS1265 devices execute a read cycle whenever
WE (Write Enable) is inactive (high) and CE (Chip
Enable) and OE (Output Enable) are active (low). The
unique address specified by the 20 address inputs (A
0
–
A
19
) defines which of the 1,048,576 bytes of data is
accessed. Valid data will be available to the eight data
output drivers within t
ACC
(Access Time) after the last
address input signal is stable, providing that CE and OE
(Output Enable) access times are also satisfied. If OE
and CE access times are not satisfied, then data access
must be measured from the later occurring signal (CE or
OE) and the limiting parameter is either t
CO
for CE or t
OE
for OE rather than t
ACC
.
WRITE MODE
The DS1265 devices execute a write cycle whenever
WE and CE signals are active (low) after address inputs
are stable. The later occurring falling edge of CE or WE
will determine the start of the write cycle. The write cycle
is terminated by the earlier rising edge of CE or WE. All
address inputs must be kept valid throughout the write
cycle. WE must return to the high state for a minimum
recovery time (t
WR
) before another cycle can be initi-
ated. The OE control signal should be kept inactive
(high) during write cycles to avoid bus contention. How-
ever, if the output drivers are enabled (CE and OE
active) then WE will disable the outputs in t
ODW
from its
falling edge.
DATA RETENTION MODE
The DS1265AB provides full functional capability for
V
CC
greater than 4.75 volts and write protects by
4.5 volts. The DS1265Y provides full functional capabil-
ity for V
CC
greater than 4.5 volts and write protects by
4.25 volts. Data is maintained in the absence of V
CC
without any additional support circuitry. The nonvolatile
static RAMs constantly monitor V
CC
. Should the supply
voltage decay, the NV SRAMs automatically write pro-
tect themselves, all inputs become don’t care, and all
outputs become high impedance. As V
CC
falls below
approximately 3.0 volts, a power switching circuit con-
nects the lithium energy source to RAM to retain data.
During power–up, when V
CC
rises above approximately
3.0 volts, the power switching circuit connects external
V
CC
to RAM and disconnects the lithium energy source.
Normal RAM operation can resume after V
CC
exceeds
4.75 volts for the DS1265AB and 4.5 volts for the
DS1265Y.
FRESHNESS SEAL
Each DS1265 device is shipped from Dallas Semicon-
ductor with its lithium energy source disconnected,
guaranteeing full energy capacity. When V
CC
is first
applied at a level greater than V
TP
, the lithium energy
source is enabled for battery backup operation.
相关PDF资料 |
PDF描述 |
|---|---|
| DS1265Y | 8M Nonvolatile SRAM |
| DS1270AB | 16M Nonvolatile SRAM(16M非易失性静态RAM) |
| DS1270Y | 16M Nonvolatile SRAM(16M非易失性静态RAM) |
| DS1270W | 3.3V 16Mb Nonvolatile SRAM |
| DS1302 | Trickle Charge Timekeeping Chip |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS1265Y/AB | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:8M Nonvolatile SRAM |
| DS1265Y-100 | 功能描述:NVRAM 8M NV SRAM RoHS:否 制造商:Maxim Integrated 数据总线宽度:8 bit 存储容量:1024 Kbit 组织:128 K x 8 接口类型:Parallel 访问时间:70 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 工作电流:85 mA 最大工作温度:+ 70 C 最小工作温度:0 C 封装 / 箱体:EDIP 封装:Tube |
| DS1265Y-100+ | 功能描述:NVRAM 8M NV SRAM RoHS:否 制造商:Maxim Integrated 数据总线宽度:8 bit 存储容量:1024 Kbit 组织:128 K x 8 接口类型:Parallel 访问时间:70 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 工作电流:85 mA 最大工作温度:+ 70 C 最小工作温度:0 C 封装 / 箱体:EDIP 封装:Tube |
| DS1265Y-100-IND | 制造商:未知厂家 制造商全称:未知厂家 功能描述:NVRAM (Battery Based) |
| DS1265Y-70 | 功能描述:NVRAM 8M NV SRAM RoHS:否 制造商:Maxim Integrated 数据总线宽度:8 bit 存储容量:1024 Kbit 组织:128 K x 8 接口类型:Parallel 访问时间:70 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 工作电流:85 mA 最大工作温度:+ 70 C 最小工作温度:0 C 封装 / 箱体:EDIP 封装:Tube |
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