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参数资料
| 型号： | DS1384 |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | XO, clock |
| 英文描述： | Watchdog Timekeeping Controller(看门狗计时器芯片) |
| 中文描述： | 1 TIMER(S), REAL TIME CLOCK, PQFP44 |
| 封装： | QFP-44 |
| 文件页数： | 4/15页 |
| 文件大小： | 130K |
| 代理商： | DS1384 |
DS1384
062598 4/15
(t
DS
) and Data Hold Time (t
DH
) with respect to the earlier
rising edge of CE or WE. The OE control signal should
be kept inactive (high) during write cycles to avoid bus
contention. However, if the output bus has been
enabled (CE and OE active), then WE will disable the
outputs in t
WEZ
from its falling edge.
When the address value presented to the DS1384 dur-
ing the write is in the range of 00000H through 0003FH,
one of the 64 on–chip registers will be selected and data
will be written into the device.
When the address value presented to the DS1384 dur-
ing the write is in the range of 00040H through 1FFFFH,
an external SRAM location will be selected.
DATA RETENTION MODE
When V
CCI
is within nominal limits (V
CC
> 4.5 volts) the
DS1384 can be accessed as described above with read
or write cycles. However, when V
CC
is below the power
fail point, V
PF
, (point at which write protection occurs)
the internal clock registers and external RAM is blocked
from access. This is accomplished internally by inhibit-
ing access to the clock registers via the CE signal. At
this time the power fail output signal (PFO) is driven ac-
tive and will remain active until V
CC
returns to nominal
levels. External RAM access is inhibited in a similar
manner by forcing CEO to high level. This level is within
0.2 volts of the V
CCI
input. CEO will remain at this level
as long as V
CCI
remains at an out–of–tolerance condi-
tion. When V
CCI
falls below the level of the battery
(V
BAT1
or V
BAT2
), power input is switched from the V
CCI
pin to the V
BAT
pin and the clock registers are main-
tained from the attached battery supply. External RAM
is also powered by the V
BAT
input when V
CCI
is below
V
BAT
pin through the V
CCO
pin. The V
CCO
pin is capable
of supplying 100
μ
A of current to the attached memory
with less than 0.3 volts drop under this condition. On
power up, when V
CCI
returns to in–tolerance conditions,
write protection continues for 150 ms by inhibiting CEO.
The PFO signal also remains active during this time.
The DS1384 is capable of supporting two batteries
which are used in a redundant fashion for applications
which require added reliability or increased battery ca-
pacity. When two batteries are used, the higher of the
two is selected for use. A selected battery will remain as
backup supply until it is significantly below the other.
When the selected battery voltage falls below the alter-
nate battery by about 0.6 volts, the alternate battery is
selected and then becomes the backup supply. This
switching occurs transparent to the user and continues
until both batteries are exhausted. When only a single
battery is required, both battery inputs can be con-
nected together. However, a more effective method of
using a single battery supply is to ground the unused
battery input. When using a single battery, V
BAT1
is the
preferred input.
WATCHDOG TIMEKEEPER REGISTERS
The DS1384 Watchdog Timekeeper Controller has 14
internal registers which are eight bits wide and contain
all of the Timekeeping, Alarm, Watchdog, Control, and
Data information. The Clock, Calendar, Alarm and
Watchdog Registers are memory locations which con-
tain external (user accessible) and internal copies of the
data. The external copies are independent of internal
functions except that they are updated periodically by
the simultaneous transfer of the incremented internal
copy (see Figure 1). The Command Register bits are af-
fected by both internal and external functions. This reg-
ister will be discussed later. The 50 bytes of RAM regis-
ters are accessed from the external address and data
bus and reside or overlay external static RAM. Regis-
ters 0, 1, 2, 4, 6, 8, 9 and A contain time of day and date
information (see Figure 2). Time of day information is
stored in BCD. Registers 3, 5, and 7 contain the time of
day alarm information. Time of day alarm information is
stored in BCD. Register B is the Command Register
and information in this register is binary. Register C and
D are the Watchdog Alarm Registers and information
which is stored in these two registers is in BCD. Regis-
ter 0000EH through register 0003FH are on–chip user
bytes and can be used to contain data at the user’s dis-
cretion.
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| DS1390-DS1393 | RIBBON CABLE, 34WAY, PER M; Cores, No. of:34; Conductor make-up:7/36AWG; Wire size, AWG:28AWG; Impedance:119R; Pitch:1.27mm; Voltage rating, AC:50V; Colour:Grey; Capacitance:70.5pF/m; Approval Bodies:UL; Approval category:Style RoHS Compliant: Yes |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS1384FP | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:Watchdog Timekeeping Controller |
| DS1384FP-12 | 功能描述:IC CTRLR RTC WDOG 120NS 44-MQFP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 实时时钟 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:- 类型:时钟/日历 特点:警报器，闰年，SRAM 存储容量:- 时间格式:HH:MM:SS（12/24 小时） 数据格式:YY-MM-DD-dd 接口:SPI 电源电压:2 V ~ 5.5 V 电压 - 电源，电池:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-WDFN 裸露焊盘 供应商设备封装:8-TDFN EP 包装:管件 |
| DS1384FP-12+ | 功能描述:实时时钟 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| DS1384FP-120 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Real-Time Clock |
| DS1384T-120 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Real-Time Clock |
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