参数资料
| 型号： | DS1862B+T&R |
| 厂商： | Maxim Integrated |
| 文件页数： | 22/43页 |
| 文件大小： | 0K |
| 描述： | IC LASR CTRLR 7CHAN 5.5V 25CSBGA |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 激光二极管控制器（光纤） |
| 数据速率： | 10Gbps |
| 通道数： | 7 |
| 电源电压： | 2.9 V ~ 5.5 V |
| 电流 - 电源： | 3mA |
| 工作温度： | -40°C ~ 100°C |
| 封装/外壳： | 25-TFBGA，CSPBGA |
| 供应商设备封装： | 25-BGA（5x5） |
| 包装： | 带卷 (TR) |
| 安装类型： | 表面贴装 |
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XFP Laser Control and Digital Diagnostic IC
Warning and Alarm Logic Based on
Signal Conditioners
The DS1862 also has flags that are set by certain logical
conditions on signal conditioner (SC) pins: SC-RX-LOL,
SC-RX-LOS, SC-TX-LOS. Similarly, for each latched
signal conditioner flag there are also mask bits that are
capable of preventing the alarm or warning flag from
causing an INTERRUPT pin to assert. Again, flags are
cleared automatically whenever their memory address
is read. See Figure 11 for more detail.
Quick-Trip Logic and FETG
Shutdown Functionality
as fast alarms) that is capable of shutting down the
LASER with the FETG pin in conjunction with shutting
down I MODSET and I BIASSET . I BMD and I BIASSET cur-
rents are measured and are compared with user-
defined trip points to set the quick-trip flags: QT LOW
TX-P, QT HIGH TX-P, and QT HIGH BIAS. These flags
are also capable of being masked to prevent FETG
from being asserted when an out-of-tolerance condition
is detected. FETG is not asserted by setting the TX-D
pin, SOFT TX-D, or P-DOWN/RST pin to a high state,
however, I MODSET , and I BIASSET will shut down. See
Figure 12 for more detail.
In addition to alarms and warnings, the DS1862 also
has quick-trip (QT) functionality (sometimes referred to
SIGNAL CONDITIONER AND MISCELLANEOUS LOGIC
HIGH TX-P
SC-TX-LOS
(PIN)
LOW TX-P
HIGH BIAS
SC-RX-LOS
LATCHED-TX-FAULT
LATCHED-TX-FAULT
LATCHED-TX-NR
(PIN)
SC-RX-LOL
LATCHED-RX-NR
P-DOWN/RST
(PIN)
TIMER
LATCHED-RESET-DONE
(PIN)
SC-RX-LOS
(PIN)
LATCHED-
RX-LOS
*
RX-LOS (PIN)
SC-RX-LOL
(PIN)
LATCHED
RX-CDR-NL
LATCHED-
MOD-NR
SC-RX-LOL (PIN)
TX-FAULT
VCC2-FAULT
*
MOD-NR (PIN)
ANY FLAG
ANY MASK BIT
*OPEN DRAIN
Figure 11. Signal Conditioner and Other Logic
INTERRUPT (PIN)
22
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