参数资料
型号: DS1865T+
厂商: Maxim Integrated Products
文件页数: 66/67页
文件大小: 0K
描述: IC PON TRIPLEXER CTRLR 28TQFN-EP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
系列: *
类型: *
应用: *
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-TQFN-EP(5x5)
包装: 管件
DS1865
PON Triplexer Control and
Monitoring Circuit
8
_____________________________________________________________________
Pin Description
PIN
NAME
FUNCTION
1
BEN
Burst Enable Input. Triggers the sampling of the APC and quick-trip monitors.
2
TX-D
Transmit Disable Input. Disables BIAS and MOD outputs.
3
TX-F
Transmit Fault Output, Open Drain
4
FETG
Output to FET Gate. Signals an external n- or p-channel MOSFET to enable/disable the laser’s current.
5, 19
VCC
Supply Voltage
6, 18
GND
Ground
7, 10, 11,
25
N.C.
No Connection
8
SDA
I2C Serial Data. Input/output for I2C data.
9
SCL
I2C Serial Clock. Input for I2C clock.
12–15
MON1–MON4
External Monitor Input 1–4. The voltage at these pins are digitized by the internal analog-to-digital
converter and can be read through the I2C interface. Alarm and warning values can be assigned to
interrupt the processor based on the ADC result.
16
DAC1
17
M4DAC
Digital-to-Analog Output DAC1 and M4DAC. Two 8-bit DAC outputs for generating analog voltages.
Typically used to control the video photodiode bias. M4DAC is controlled by the input voltage on MON4
and Table 06h LUT.
20
BIAS
Bias Current Output. This current DAC generates the bias current reference for the MAX3643.
21
MOD
Modulation Output Voltage. This 8-bit voltage output has eight full-scale ranges from 1.25V to 0.3125V.
This pin is connected to the MAX3643’s VMSET input to control the modulation current.
22
BMD
Monitor Diode Input (Feedback Voltage, Transmit Power Monitor)
23
LOSI
Loss-of-Signal Input. This input is accessible in the status register through the I2C interface.
24
D0
Digital I/O 0. This signal is either the open-drain output driver for LOSI, or can be controlled by the
OUT0 bit (D0OUT). The logic level of this pin is indicated by the D0IN and LOS status bits.
26, 27,
28
D1, D2, D3
Digital I/O 1–3. These are bidirectional pins controlled by internally addressable bits. The outputs are
open-drain.
EP
Exposed Pad. This contact should be connected to GND.
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