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| 型号： | DS1865T+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 7/67页 |
| 文件大小： | 0K |
| 描述： | IC PON TRIPLEXER CTRLR 28TQFN-EP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | * |
| 应用： | * |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-WFQFN 裸露焊盘 |
| 供应商设备封装： | 28-TQFN-EP（5x5） |
| 包装： | 管件 |
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DS1865
PON Triplexer Control and
Monitoring Circuit
____________________________________________________________________
15
inadequate VCC exists to operate the laser driver. Once
adequate VCC is present to clear the VCC low alarm, the
outputs are enabled following the same sequence as the
power-up sequence.
As previously mentioned, the FETG is an output used to
disable the laser current through a series nMOSFET or
pMOSFET. This requires that the FETG output can sink
or source current. Because the DS1865 does not know
if it should sink or source current before VCC exceeds
VPOA, which triggers the EE recall, this output will
be high impedance when VCC is below VPOA (see the
Low-Voltage Operation section for details and
diagram). The application circuit must use a pullup or
pulldown resistor on this pin that pulls FETG to the
alarm/shutdown state (high for a pMOS, low for a
nMOS). Once VCC is above VPOA, the DS1865 pulls the
FETG output to the state determined by the FETG DIR
bit (Table 02h, Register 89h). FETG DIR is 0 if an nMOS
is used and 1 if a pMOS is used.
Determining Alarm Causes
Using the I2C Interface
To determine the cause of the TX-F or FETG alarm, the
system processor can read the DS1865’s Alarm Trap
Bytes (ATB) through the I2C interface (in Table 01h). The
ATB has a bit for each alarm. Any time an alarm occurs,
regardless of the mask bit’s state, the DS1865 sets the
corresponding bit in the ATB. Active ATB bits remain set
until written to zeros through the I2C interface. On power-
up, the ATB is zeros until alarms dictate otherwise.
Die Identification
The DS1865 has an ID hard coded to its die. Two regis-
ters (Table 02h bytes 86h–87h) are assigned for this
feature. Byte 86h reads 65h to identify the part as the
DS1865, byte 87h reads the die revision.
Low-Voltage Operation
The DS1865 contains two power-on reset (POR) levels.
The lower level is a digital POR (VPOD) and the higher
level is an analog POR (VPOA). At startup, before the
supply voltage rises above VPOA, the outputs are dis-
abled (FETG and BIAS outputs are high impedance,
MOD is low), all SRAM locations are low (including
shadowed EEPROM), and all analog circuitry is dis-
abled. When VCC reaches VPOA, the SEE is recalled,
and the analog circuitry is enabled. While VCC remains
above VPOA, the device is in its normal operating state,
and it responds based on its nonvolatile configuration.
If during operation VCC falls below VPOA but is still
above VPOD, the SRAM retains the SEE settings from
TX-F LATCHED OPERATION
TX-F NON LATCHED OPERATION
DETECTION OF
TX-F FAULT
TX-D OR
TX-F RESET
TX-F
DETECTION OF
TX-F FAULT
TX-F
Figure 5. TX-F Timing
Table 4. TX-F as a Function of TX-D and
Alarm Sources
VCC > VPOA
TX-D
NONMASKED
TX-F ALARM
TX-F
No
X
1
Yes
0
Yes
0
1
Yes
1
X
0
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS1865T TR | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:PON Triplexer Control and Monitoring Circuit |
| DS1865T+ | 功能描述:电流和电力监控器、调节器 PON Triplexer Cntrl & Monitoring Circuit RoHS:否 制造商:STMicroelectronics 产品:Current Regulators 电源电压-最大:48 V 电源电压-最小:5.5 V 工作温度范围:- 40 C to + 150 C 安装风格:SMD/SMT 封装 / 箱体:HPSO-8 封装:Reel |
| DS1865T+T&R | 制造商:Maxim Integrated Products 功能描述:TRIPLEXER CONTROL AND MONITORING CIRCUIT 1TX 1RX 1.25GBPS 28 - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC PON CONTROL TRI 28-TQFN 制造商:Maxim Integrated Products 功能描述:Current & Power Monitors & Regulators PON Triplexer Cntrl & Monitoring Circuit |
| DS1865T+T&R | 功能描述:电流和电力监控器、调节器 PON Triplexer Cntrl & Monitoring Circuit RoHS:否 制造商:STMicroelectronics 产品:Current Regulators 电源电压-最大:48 V 电源电压-最小:5.5 V 工作温度范围:- 40 C to + 150 C 安装风格:SMD/SMT 封装 / 箱体:HPSO-8 封装:Reel |
| DS1865T+TR | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:PON Triplexer Control and Monitoring Circuit |
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