参数资料
型号: DS2156DK
厂商: Maxim Integrated Products
文件页数: 5/21页
文件大小: 0K
描述: KIT DESIGN FOR DS2156
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
主要目的: 电信,线路接口单元(LIU)
已用 IC / 零件: DS2156

DS2155DK/DS2156DK T1/E1/J1 Single-Chip Transceiver Design Kit Daughter Cards
Sample UTOPIA II Configuration (DS2156 Only)
The following register settings configure the DS2156 daughter card for UTOPIA II, single CLAV, 8-bit mode on PHY
port 0. UTOPIA II bus connection is provided by header J1 (Tx) and header J2 (Rx).
After configuring the following registers toggle the MSTREG.URST bit to reset the UTOPIA II core.
UTOPIA II Setup, Register Settings for daughter card CPLD
NAME
SWITCH 1
SWITCH 2
SWITCH 3
VALUE
0x0F
0x03
0x0F
NAME
SWITCH 4
LEVELS
VALUE
0x0F
0x07
UTOPIA II Setup, Register Settings for DS2156 E1 Configuration
NAME
MSTREG
E1RCR1
E1RCR2
E1TCR1
E1TCR2
CCR1
CCR4
IOCR1
IOCR2
VALUE
0x02
0x68
0x00
0x15
0x00
0x00
0x00
0x00
0x00
NAME
LBCR
TAF
TNAF
LIC1
LIC2
LIC3
LIC4
VALUE
0x00
0x9B
0xC0
0x11
0x90
0x00
0x00
UTOPIA II Setup, Register Settings for DS2156 UTOPIA II Configuration
NAME
U_TCFR
U_TCR1
U_TCR2
U_RCFR
U_RCR1
VALUE
0x01
0x05
0x00
0x01
0x01
NAME
U_RCR2
U_TIUPB
PCPR
PCDR1, 2, 3, 4
VALUE
0x0
0x0
0x22
0x0
REGISTER MAP
The DK101 daughter card address space begins at 0x81000000.
The DK2000 daughter card address space begins at:
0x30000000 for slot 0
0x40000000 for slot 1
0x50000000 for slot 2
0x60000000 for slot 3
All offsets given in Table 1 are relative to the beginning of the daughter card address space.
Table 1. Daughter Card Address Map
OFFSET
0X0000
to
0X0015
0X1000
to 0X10ff
DEVICE
CPLD
Single-Chip
Transceiver
DESCRIPTION
Board identification and clock/signal routing
Board is populated with one of the following:
DS2156, DS2155, DS21352, or DS21354.
Please see data sheet for details.
Registers in the CPLD can be easily modified using the ChipView.exe, a host-based user interface software along
with the definition file named DS215x_35x_CPLD_V2.def . Definition files for the SCT are named DS2155.def ,
DS21352.def , or DS21354.def , depending on the board population option.
5 of 21
相关PDF资料
PDF描述
DS21Q348DK KIT DESIGN FOR DS21Q348
DS21Q55DK KIT DESIGN FOR DS21Q55
DS2436K KIT DEMO BATT ID/MON CHIP DS2436
DS2438K KIT DEMO SMART BATT MON DS2438
DS26303DK KIT DESIGN FOR DS26303
相关代理商/技术参数
参数描述
DS2156G 制造商:Maxim Integrated Products 功能描述:DS2156 T1/E1/J1 SCT+UTOPIA 100BGA - Trays
DS2156G+ 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:T1/E1/J1 Single-Chip Transceiver TDM/UTOPIA II Interface
DS2156GN 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:T1/E1/J1 Single-Chip Transceiver TDM/UTOPIA II Interface
DS2156GN+ 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:T1/E1/J1 Single-Chip Transceiver TDM/UTOPIA II Interface
DS2156L 功能描述:网络控制器与处理器 IC T1/E1/J1 Transceiver TDM/UTOPIA II Intrfc RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流(最大值):595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray