- 您现在的位置：买卖IC网 > PDF目录1914 > DS21Q43-ATN (Maxim Integrated Products)IC FRAMER E1 QUAD 5V 128-TQFP PDF资料下载
参数资料
| 型号： | DS21Q43-ATN |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 14/60页 |
| 文件大小： | 0K |
| 描述： | IC FRAMER E1 QUAD 5V 128-TQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 72 |
| 控制器类型： | E1 调帧器 |
| 接口： | 并行/串行 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 电流 - 电源： | 32mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 128-LQFP |
| 供应商设备封装： | 128-LQFP（14x20） |
| 包装： | 管件 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页当前第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页
DS21Q43A
21 of 60
CCR3: COMMON CONTROL REGISTER 3 (Address=1B Hex)
(MSB)
(LSB)
TESE
TCBFS
TIRFS
ESR
LIRST
-
TBCS
-
SYMBOL
POSITION
NAME AND DESCRIPTION
TESE
CCR3.7
Transmit Side Elastic Store Enable.
0=elastic store is bypassed.
1=elastic store is enabled.
TCBFS
CCR3.6
Transmit Channel Blocking Registers (TCBR) Function
Select.
0=TCBRs define the operation of the TCHBLK output pin.
1=TCBRs define which signaling bits are to be inserted.
TIRFS
CCR3.5
Transmit Idle Registers (TIR) Function Select.
0=TIRs define in which channels to insert idle code.
1=TIRs define in which channels to insert data from RSER.
ESR
CCR3.4
Elastic Stores Reset. Setting this bit from a 1 to a 0 will force
the elastic stores to a known depth. Should be toggled after
RSYSCLK and TSYSCLK have been applied and are stable.
Must be set and cleared again for a subsequent reset. Do not
leave this bit set high.
-
CCR3.3
Not Assigned. Should be set to 0 when written.
-
CCR3.2
Not Assigned. Should be set to 0 when written.
TBCS
CCR3.1
Transmit Side Backplane Clock Select.
0=if TSYSCLK is 1.544 MHz
1=if TSYSCLK is 2.048 MHz
-
CCR3.0
Not Assigned. Should be set to 0 when written.
POWER-UP SEQUENCE
On power-up, after the supplies are stable, the DS21Q43A should be configured for operation by writing
to all of the internal registers (this includes the Test Registers) since the contents of the internal registers
cannot be predicted on power-up. Finally, after the RSYSCLK and TSYSCLK inputs are stable, the ESR
bit should be toggled from a 0 to a 1 and then back to 0 (this step can be skipped if the elastic store is not
being used).
4.0 STATUS AND INFORMATION REGISTERS
There is a set of four registers that contain information on the current real time status of the DS21Q43A,
Status Register 1 (SR1), Status Register 2 (SR2), Receive Information Register (RIR), and Synchronizer
Status Register (SSR). When a particular event has occurred (or is occurring), the appropriate bit in one
of these four registers will be set to a 1. All of the bits in these registers operate in a latched fashion
(except for the SSR).
相关PDF资料 |
PDF描述 |
|---|---|
| DS21Q44T+ | IC FRAMER ENHANCED E1 4X 128TQFP |
| DS21Q50LN | IC TRANSCEIVER E1 QD IND 100LQFP |
| DS21Q55 | IC TXRX QUAD T1/E1/J1 SCT 256BGA |
| DS21Q59LN+ | IC TXRX E1 QUAD 100-LQFP |
| DS21S07AS+T&R | IC TERMINATOR SCSI 16-SOIC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS21Q44 | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:Enhanced QUAD E1 FRAMER |
| DS21Q44T | 功能描述:网络控制器与处理器 IC Enhanced Quad E1 Framer RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS21Q44T+ | 功能描述:网络控制器与处理器 IC Enhanced Quad E1 Framer RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS21Q44TN | 功能描述:网络控制器与处理器 IC RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| DS21Q48 | 功能描述:网络控制器与处理器 IC 5V Quad E1/T1/J1 Line Interface RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
发布紧急采购，3分钟左右您将得到回复。