收藏本站
参数资料
型号： DS21Q43-ATN
厂商： Maxim Integrated Products
文件页数： 32/60页
文件大小： 0K
描述： IC FRAMER E1 QUAD 5V 128-TQFP
产品培训模块： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装： 72
控制器类型： E1 调帧器
接口： 并行/串行
电源电压： 4.5 V ~ 5.5 V
电流 - 电源： 32mA
工作温度： -40°C ~ 85°C
安装类型： 表面贴装
封装/外壳： 128-LQFP
供应商设备封装： 128-LQFP（14x20）
包装： 管件
DS21Q43A
38 of 60
informed when the signaling registers need to be loaded with data. The user has 2 ms to load the data
before the old data will be retransmitted. Via the CCR3.6 bit, the user has the option to use the Transmit
Channel Blocking Registers (TCBRs) to determine on a channel by channel basis, which signaling bits
are to be inserted via the TSRs (the corresponding bit in the TCBRs=1) and which are to be sourced from
the TSER pin (the corresponding bit in the TCBRs=0). See the Transmit Data Flow diagram in Section 11
for more details.
8.0 TRANSMIT IDLE REGISTERS
There is a set of five registers in the DS21Q43A that can be used to custom tailor the data that is to be
transmitted onto the E1 line, on a channel by channel basis. Each of the 32 E1 channels can be forced to
have a user defined idle code inserted into them.
TIR1/TIR2/TIR3/TIR4: TRANSMIT IDLE REGISTERS (Address=26 to 29 Hex)
(MSB)
(LSB)
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
TIR1 (26)
CH16
CH15
CH14
CH13
CH12
CH11
CH10
CH9
TIR2 (27)
CH24
CH23
CH22
CH21
CH20
CH19
CH18
CH17
TIR3 (28)
CH32
CH31
CH30
CH29
CH28
CH27
CH26
CH25
TIR4 (29)
SYMBOL
POSITION
NAME AND DESCRIPTION
CH32
TIR4.7
Transmit Idle Registers.
0=do not insert the Idle Code into this channel
CH1
TIR1.0
1=insert the Idle Code into this channel
NOTE:
If CCR3.5=1, then a 0 in the TIRs implies that channel data is to be sourced from TSER and a 1 implies
that channel data is to be sourced from the RSER pin.
TIDR: TRANSMIT IDLE DEFINITION REGISTER (Address=2A Hex)
(MSB)
(LSB)
TIDR7
TIDR6
TIDR5
TIDR4
TIDR3
TIDR2
TIDR1
TIDR0
SYMBOL
POSITION
NAME AND DESCRIPTION
TIDR7
TIDR.7
MSB of the Idle Code.
TIDR0
TIDR.0
LSB of the Idle Code.
Each of the bit positions in the Transmit Idle Registers (TIR1/TIR2/TIR3/TIR4) represent a timeslot in
the outgoing frame. When these bits are set to a 1, the corresponding channel will transmit the Idle Code
contained in the Transmit Idle Definition Register (TIDR). In the TIDR, the MSB is transmitted first. Via
the CCR3.5 bit, the user has the option to use the TIRs to determine on a channel by channel basis, if data
from the RSER pin should be substituted for data from the TSER pin. In this mode, if the corresponding
bit in the TIRs is set to 1, then data will be sourced from the RSER pin. If the corresponding bit in the
TIRs is set to 0, then data for that channel will sourced from the TSER pin. See the Transmit Data Flow
diagram in Section 11 for more details.
相关PDF资料
PDF描述
DS21Q44T+ IC FRAMER ENHANCED E1 4X 128TQFP
DS21Q50LN IC TRANSCEIVER E1 QD IND 100LQFP
DS21Q55 IC TXRX QUAD T1/E1/J1 SCT 256BGA
DS21Q59LN+ IC TXRX E1 QUAD 100-LQFP
DS21S07AS+T&R IC TERMINATOR SCSI 16-SOIC
相关代理商/技术参数
参数描述
DS21Q44 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:Enhanced QUAD E1 FRAMER
DS21Q44T 功能描述:网络控制器与处理器 IC Enhanced Quad E1 Framer RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
DS21Q44T+ 功能描述:网络控制器与处理器 IC Enhanced Quad E1 Framer RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
DS21Q44TN 功能描述:网络控制器与处理器 IC RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
DS21Q48 功能描述:网络控制器与处理器 IC 5V Quad E1/T1/J1 Line Interface RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

*型号 *数量 厂商 批号 封装
添加更多采购

我的联系方式

*
*
*