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参数资料
| 型号： | DS2423D/T&R |
| 厂商： | Maxim Integrated |
| 文件页数： | 25/26页 |
| 文件大小： | 0K |
| 描述： | IC SRAM 4KBIT 6FCHIP |
| 标准包装： | 10,000 |
| 格式 - 存储器： | RAM |
| 存储器类型： | SRAM |
| 存储容量： | 4K (256 x 16) |
| 接口： | 1 线 串行 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 6-XBGA，FCBGA |
| 供应商设备封装： | 6-覆晶（2.82x2.54） |
| 包装： | 带卷 (TR) |
DS2423
NOTES:
1) All voltages are referenced to ground.
2) V PUP = external pullup voltage.
3) Input load is to ground.
4) An additional reset or communication sequence cannot begin until the reset high time has expired.
5) Read data setup time refers to the time the host must pull the 1-Wire bus low to read a bit. Data is
guaranteed to be valid within 1μs of this falling edge.
6) Capacitance on the data pin could be 800pF when power is first applied. If a 5k ? resistor is used to
pull up the data line to V PUP , 5μs after power has been applied the parasite capacitance will not affect
normal communications.
7) The reset low time (t RSTL ) should be restricted to a maximum of 960μs, to allow interrupt signaling,
otherwise, it could mask or conceal interrupt pulses.
8) V IH is a function of the external pullup resistor and V PUP .
9) Under certain low voltage conditions V ILMAX may have to be reduced to as much as 0.5V to always
guarantee a Presence Pulse.
10) The counter inputs are designed for interfacing to mechanical switches and piezo sensors. If
interfacing to digital circuits, one should use an open drain driver.
11) A lower impedance pullup, e. g., for reed switches, can be achieved by connecting an external resistor
from the counter input to V BAT .
12) Read and write scratchpad (all 32 bytes) at V BAT of 3.0 V.
13) Each low-going edge on a counter input resets the channel’s debounce timer. The debounce time
starts as the input voltage rises beyond the trip point. In order for the next pulse to be counted the
debounce time must have expired.
14) The optimal sampling point for the master is as close as possible to the end time of the t RDV period
without exceeding t RDV . For the case of a Read-One Time slot, this maximizes the amount of time for
the pullup resistor to recover to a high level. For a Read-Zero Time slot, it ensures that a read will
occur before the fastest 1-Wire device(s) releases the line.
15) The duration of the low pulse sent by the master should be a minimum of 1 μ s with a maximum value
as short as possible to allow time for the pullup resistor to recover the line to a high level before the 1-
Wire device samples in the case of a Write-One Time or before the master samples in the case of a
Read-One Time.
16) Guaranteed by design; not production tested.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DS2423MRAB0 | 制造商:Thomas & Betts 功能描述:300A,NLT,3P4W,MG,423,3P480V |
| DS2423P | 功能描述:静态随机存取存储器 RoHS:否 制造商:Cypress Semiconductor 存储容量:16 Mbit 组织:1 M x 16 访问时间:55 ns 电源电压-最大:3.6 V 电源电压-最小:2.2 V 最大工作电流:22 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TSOP-48 封装:Tray |
| DS2423P/R | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:4kbit 1-Wire RAM with Counter |
| DS2423P/T | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:4kbit 1-Wire RAM with Counter |
| DS2423P/T&R | 功能描述:静态随机存取存储器 RoHS:否 制造商:Cypress Semiconductor 存储容量:16 Mbit 组织:1 M x 16 访问时间:55 ns 电源电压-最大:3.6 V 电源电压-最小:2.2 V 最大工作电流:22 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TSOP-48 封装:Tray |
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