DS2431: 1024-Bit, 1-Wire EEPROM
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PARAMETER
I/O PIN, 1-Wire WRITE
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Standard speed
Overdrive speed (Note 13)
Standard speed
Overdrive speed
60
7
5
1
120
16
15 -
ε
2 -
ε
Write-0 Low Time (Note 1)
t
W0L
μs
Write-1 Low Time
(Notes 1, 15)
I/O PIN, 1-Wire READ
Read Low Time
(Notes 1, 16)
Read Sample Time
(Notes 1, 16)
EEPROM
Programming Current
Programming Time
Write/Erase Cycles
(Endurance)
Data Retention
t
W1L
μs
Standard speed
Overdrive speed
Standard speed
Overdrive speed
5
1
15 -
δ
2 -
δ
15
2
t
RL
μs
t
RL
+
δ
t
RL
+
δ
t
MSR
μs
I
PROG
t
PROG
(Note 17)
(Note 18)
At 25°C
At 85°C (worst case)
At 85°C (worst case)
1
mA
ms
12.5
200k
50k
10
N
CY
---
t
DR
years
Note 1:
Note 2:
System requirement.
Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery times. The
specified value here applies to systems with only one device and with the minimum 1-Wire recovery times. For more heavily
loaded systems, an active pullup such as that found in the DS2482-x00, DS2480B, or DS2490 may be required.
Capacitance on the data pin could be 800pF when V
is first applied. If a 2.2k
resistor is used to pull up the data line, 2.5μs
after V
has been applied the parasite capacitance will not affect normal communications.
Guaranteed by design, simulation only. Not production tested.
V
, V
, and V
are a function of the internal supply voltage.
Voltage below which, during a falling edge on I/O, a logic 0 is detected.
The voltage on I/O needs to be less or equal to V
whenever the master drives the line low.
Voltage above which, during a rising edge on I/O, a logic 1 is detected.
After V
is crossed during a rising edge on I/O, the voltage on I/O has to drop by at least V
HY
to be detected as logic '0'.
The I-V characteristic is linear for voltages less than 1V.
Applies to a single DS2431 attached to a 1-Wire line.
The earliest recognition of a negative edge is possible at t
after V
has been previously reached.
Highlighted numbers are NOT in compliance with legacy 1-Wire product standards. See comparison table below.
Interval during the negative edge on I/O at the beginning of a Presence Detect pulse between the time at which the voltage is
80% of V
PUP
and the time at which the voltage is 20% of V
PUP
.
ε
represents the time required for the pullup circuitry to pull the voltage on I/O up from V
IL
to V
TH
.
δ
represents the time required for the pullup circuitry to pull the voltage on I/O up from V
IL
to the input high threshold of the bus
master.
Current drawn from I/O during the EEPROM programming interval. The pullup circuit on I/O during the programming interval
should be such that the voltage at I/O is greater than or equal to Vpup(min). If Vpup in the system is close to Vpup(min) then a
low impedance bypass of Rpup which can be activated during programming may need to be added.
Interval begins t
after the leading negative edge on IO for the last timeslot of the E/S byte for a valid Copy Scratchpad
sequence. Interval ends once the device's self-timed EEPROM programming cycle is complete and the current drawn by the
device has returned from I
PROG
to I
L
.
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
Note 12:
Note 13:
Note 14:
Note 15:
Note 16:
Note 17:
Note 18:
LEGACY VALUES
DS2431 VALUES
PARAMETER
STANDARD SPEED
MIN
61μs
480μs
15μs
60μs
60μs
OVERDRIVE SPEED
MIN
7μs
48μs
2μs
8μs
6μs
STANDARD SPEED
MIN
65μs
1)
504μs
15μs
60μs
60μs
OVERDRIVE SPEED
MIN
9μs
53μs
2μs
8μs
7μs
MAX
(undef.)
(undef.)
60μs
240μs
120μs
MAX
(undef.)
80μs
6μs
24μs
16μs
MAX
(undef.)
640μs
63μs
240μs
120μs
MAX
(undef.)
80μs
7μs
26μs
16μs
t
SLOT
(incl. t
REC
)
t
RSTL
t
PDH
t
PDL
t
W0L
1)
Intentional change, longer recovery time requirement due to modified 1-Wire front end.
PIN DESCRIPTION
NAME
I/O
GND
N.C.
FUNCTION
1-Wire Bus Interface. Open drain, requires external pullup resistor.
Ground Reference
Not Connected