- 您现在的位置：买卖IC网 > PDF目录378591 > DS2431P The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each PDF资料下载
参数资料
| 型号： | DS2431P |
| 元件分类： | DRAM |
| 英文描述： | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 中文描述： | 该CAT24FC02是一个2 KB的EEPROM的国内256个8位每字举办的串行CMOS |
| 文件页数： | 8/23页 |
| 文件大小： | 170K |
| 代理商： | DS2431P |
DS2431: 1024-Bit, 1-Wire EEPROM
8 of 23
WRITING WITH VERIFICATION
To write data to the DS2431, the scratchpad has to be used as intermediate storage. First the master issues the
Write Scratchpad command to specify the desired target address, followed by the data to be written to the
scratchpad. Note that Copy Scratchpad commands must be performed on 8-byte boundaries, i. e., the 3 LSBs of
the target address (T2..T0) must be equal to 000b. If T2..T0 are sent with non-zero values, the copy function will be
blocked. Under certain conditions (see Write Scratchpad command) the master will receive an inverted CRC16 of
the command, address (actual address sent) and data at the end of the Write Scratchpad command sequence.
Knowing this CRC value, the master can compare it to the value it has calculated itself to decide if the
communication was successful and proceed to the Copy Scratchpad command. If the master could not receive the
CRC16, it should send the Read Scratchpad command to verify data integrity. As a preamble to the scratchpad
data, the DS2431 repeats the target address TA1 and TA2 and sends the contents of the E/S register. If the PF
flag is set, data did not arrive correctly in the scratchpad or there was a loss of power since data was last written to
the scratchpad. The master does not need to continue reading; it can start a new trial to write data to the
scratchpad. Similarly, a set AA flag together with a cleared PF flag indicates that the device did not recognize the
Write command. If everything went correctly, both flags are cleared. Now the master can continue reading and
verifying every data byte. After the master has verified the data, it can send the Copy Scratchpad command, for
example. This command must be followed exactly by the data of the three address registers, TA1, TA2, and E/S.
The master should obtain the contents of these registers by reading the scratchpad.
MEMORY FUNCTION COMMANDS
The
Memory Function Flow Chart
(Figure 7) describes the protocols necessary for accessing the memory of the
DS2431. An example on how to use these functions to write to and read from the device is included at the end of
this document. The communication between master and DS2431 takes place either at regular speed (default, OD =
0) or at Overdrive Speed (OD = 1). If not explicitly set into the Overdrive Mode, the DS2431 assumes regular
speed.
WRITE SCRATCHPAD COMMAND [0Fh]
The Write Scratchpad command applies to the data memory, and the writable addresses in the register page. In
order for the scratchpad data to be valid for copying to the array, the user must perform a Write Scratchpad
command of 8 bytes starting at a valid row boundary. The Write Scratchpad command accepts invalid addresses,
and partial rows, but subsequent Copy Scratchpad commands are blocked.
After issuing the Write Scratchpad command, the master must first provide the 2-byte target address, followed by
the data to be written to the scratchpad. The data is written to the scratchpad starting at the byte offset of T2:T0.
The ES bits E2:E0 are loaded with the starting byte offset, and increment with each susequent byte. Effectively,
E2:E0 is the byte offset of the last full byte written to the scratchpad. Only full data bytes are accepted.
When executing the Write Scratchpad command, the CRC generator inside the DS2431 (Figure 13) calculates a
CRC of the entire data stream, starting at the command code and ending at the last data byte as sent by the
master. This CRC is generated using the CRC16 polynomial by first clearing the CRC generator and then shifting
in the command code (0FH) of the Write Scratchpad command, the Target Addresses (TA1 and TA2), and all the
data bytes. Note that the CRC16 calculation is performed with the actual TA1 and TA2 and data sent by the
master. The master may end the Write Scratchpad command at any time. However, if the end of the scratchpad is
reached (E2:E0 = 111b), the master may send 16 read-time slots and receive the CRC generated by the DS2431.
If a Write Scratchpad is attempted to a write-protected location, the scratchpad is loaded with the data already in
memory, rather than the data transmitted. Similarly, if the target address page is in EPROM mode, the scratchpad
is loaded with the bitwise logical AND of the transmitted data and data already in memory.
相关PDF资料 |
PDF描述 |
|---|---|
| DS2431X | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| DS2441 | 1-Cell Li-Ion Battery Manager |
| DS2450 | 1-Wire Quad A/D Converter |
| DS2450S | 1-Wire Quad A/D Converter |
| DS2480 | Serial 1.Wire Line Driver |
相关代理商/技术参数 |
参数描述 |
|---|---|
| DS2431P R | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:1024-Bit, 1-Wire EEPROM |
| DS2431P T | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:1024-Bit, 1-Wire EEPROM |
| DS2431P/R | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:1024-Bit 1-Wire EEPROM |
| DS2431P/T | 制造商:DALLAS 制造商全称:Dallas Semiconductor 功能描述:1024-Bit 1-Wire EEPROM |
| DS2431P/T&R | 功能描述:电可擦除可编程只读存储器 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
发布紧急采购，3分钟左右您将得到回复。