参数资料
型号: DS2441
英文描述: 1-Cell Li-Ion Battery Manager
中文描述: 1节锂离子电池管理器
文件页数: 21/29页
文件大小: 134K
代理商: DS2441
DS2441
21 of 29
INITIALIZATION
All transactions on the 1-Wire bus begin with an initialization sequence consisting of a Reset Pulse
transmitted by the bus master followed by a presence pulse simultaneously transmitted by the DS2441
and any other slaves on the bus. The presence pulse tells the bus master than one or more devices are on
the bus and ready to operate. For more details, see the 1-Wire Signaling section below.
ROM COMMANDS
Once the bus master has detected the presence of one or more slaves, it can issue one of the four ROM
Commands described below. The name of each ROM Command is followed by the eight-bit opcode for
that command in square brackets. Figure 17 below presents a transaction flow chart of the four ROM
Commands.
Read ROM [33h].
This command allows the bus master to read the DS2441’s 8-bit family code (25h),
unique 48-bit serial number, and 8-bit CRC. This command can only be used if there is a single slave on
the bus. If more than one slave is present, a data collision occurs when all slaves try to transmit at the
same time (open drain produces a wired-AND result).
Match ROM [55h].
The Match ROM command, followed by a 64-bit ROM sequence, allows the bus
master to specifically address one DS2441 on the 1-Wire bus. Only the DS2441 that exactly matches the
64-bit ROM sequence responds to the subsequent Function Command. All slaves that do not match the
64-bit ROM sequence wait for a reset pulse. This command can be used with one or more devices on the
bus.
Skip ROM [CCh].
This command saves time when there is only one DS2441 on the bus by allowing the
bus master to issue a Function Command without specifying the 64-bit ID of the slave. If more than one
slave device is present on the bus and the subsequent Function Command instructs the slaves to send data
to the master, a data collision occurs when all slaves transmit data at the same time.
Search ROM [F0h].
This command allows the bus master to use a process of elimination to identify the
64-bit ROM IDs of all slave devices on the bus. The ROM search process involves the repetition of a
simple 3-step routine: read a bit, read the complement of the bit, then write the desired value of that bit.
The bus master performs this simple, three-step routine on each bit of the ROM ID. After one complete
pass through all 64 bits, the bus master knows the ROM ID of one device. The remaining devices can
then by identified on additional passes. See Chapter 5 of the Book of DS19xx iButton
Standards for a
comprehensive discussion of a ROM search, including an actual example.
相关PDF资料
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