参数资料
型号: DS2441
英文描述: 1-Cell Li-Ion Battery Manager
中文描述: 1节锂离子电池管理器
文件页数: 25/29页
文件大小: 134K
代理商: DS2441
DS2441
25 of 29
WRITE TIME SLOTS
A write time slot is initiated when the bus master pulls the 1-Wire bus line from a logic high (inactive)
level to a logic low level. There are two types of write time slots: Write 1 time slots and Write 0 time
slots. All write time slots must be t
SLOT
(60 to 120
μ
s) in duration with a 1
μ
s minimum recovery time,
t
REC
, between cycles. The DS2441 samples the 1-Wire bus line between 15 and 60
μ
s after the line falls.
If the line is high when sampled, a Write 1 occurs. If the line is low when sampled, a Write 0 occurs (see
Figure 20). For the bus master to generate a Write 1 time slot, the bus line must be pulled to a logic low
level and then released, allowing the line to pull up to a logic high level within 15
μ
s after the start of the
write time slot. For the host to generate a Write 0 time slot, the bus line must be pulled to a logic low
level and remain low for the duration of the write time slot.
READ TIME SLOTS
A read time slot is initiated when the bus master pulls the 1-Wire bus line from a logic high level to logic
low level. The bus master must keep the bus line low for at least 1
μ
s and then release it to allow the
DS2441 to present valid data. The bus master can then sample the data t
RDV
(15
μ
s) from the start of the
read time slot. By the end of the read time slot, the DS2441 releases the bus line and allow it to be pulled
high by the external pullup resistor. All read time slots must be t
SLOT
(60 to 120
μ
s) in duration with a 1
μ
s minimum recovery time, t
REC
, between cycles. See Figure 20 for more information.
1-WIRE WRITE AND READ TIME SLOTS
Figure 20
t
SLOT
t
LOW0
>1
μ
s
V
CC
GND
WRITE 0 SLOT
DS2441 Sample Window
TYP
MIN
MAX
15
μ
s
15
μ
s
30
μ
s
WRITE 1 SLOT
t
SLOT
t
LOW1
t
REC
DS2441 Sample Window
TYP
MIN
MAX
15
μ
s
15
μ
s
30
μ
s
t
SLOT
>1
μ
s
V
CC
GND
READ 0 SLOT
t
RDV
READ 1 SLOT
t
SLOT
t
REC
DQ
DQ
LINE TYPE LEGEND:
Bus master active low
DS2441 active low
Resistor pullup
Both bus master and
DS2441 active low
Master Sample Window
Master Sample Window
t
RDV
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