参数资料
型号: DS2441
英文描述: 1-Cell Li-Ion Battery Manager
中文描述: 1节锂离子电池管理器
文件页数: 23/29页
文件大小: 134K
代理商: DS2441
DS2441
23 of 29
FUNCTION COMMANDS
After successfully completing one of the four ROM Commands, the bus master can access the features of
the DS2441 with any of the six Function Commands described below. The name of each Function
Command is followed by the eight-bit opcode for that command in square brackets.
Lock Register [43h].
This command locks (disables write access to) Page 0 memory and sets the LOCK
bit in the Status Register.
Unlock Register [44h].
This command unlocks (enables write access to) Page 0 memory and clears the
LOCK bit in the Status Register.
Read Register [BEh, XX].
This command reads the contents of page XX, starting at address 00h within
the page. Valid page numbers are 00h through 03h. The page number byte must be entered immediately
following the command opcode. The least significant bit from address 00h is available to be read
immediately after the most significant bit of the page number has been entered. Reading proceeds
automatically from address 00h to address 1Fh in the page. If the bus master continues to read beyond
address 1Fh, the DS2441 continuously outputs logic 1. Data transfer may be terminated with a Reset
Pulse at any point. The bus master need not read out whole pages or even whole bytes.
Write Register [4Eh, XX].
This command writes to page XX, starting at address 00h within the page.
Valid page numbers are 00h, 02h and 03h (Page 1 is read-only). The page number byte must be entered
immediately following the command opcode. Data to be written to address 00h must be entered
immediately following the page number byte. The memory in the DS2441 is written a byte at a time, and
data transfer may be terminated with a Reset Pulse at any byte boundary. Read-only bits and “Reserved”
memory locations are not affected by the write operation. Incomplete bytes are not written.
Recall Setup [B8h].
This command reloads the power-on default values for the Control, Delay Timing,
Discharge Termination Warning, Manufacturing ID and Configuration registers.
Channel Access [F5h].
This command directs the DQ bit stream to/from the PIO pin of the DS2441. If
the
W
R/
bit in the Configuration Register is logic 1 when this command is entered, read cycles on the 1-
Wire bus return the state of the PIO pin. The state of the PIO pin can be read for any number of bus
cycles. If the
W
R/
bit is set to logic 0 when this command is entered, write cycles on the 1-Wire bus are
translated into equivalent logic levels on the PIO pin. If data is written to the PIO pin, a Write 0 time slot
enables the PIO pin’s open-drain output driver after delay t
D0
, while a Write 1 time slot disables the
output driver after t
D1
. A pullup resistor must be connected between the PIO pin and the VDD pin to
achieve a logic 1 value on PIO. A Reset Pulse on the 1-Wire bus terminates the data stream. After a
Channel Access write is terminated, the PIO pin latches and drives the last value written until a new
Channel Access command is given. See Figure 18 for Channel Access write timing.
CHANNEL ACCESS COMMAND WRITE TIMING
Figure 18
0
1
1
t
D0
t
D1
1-Wire Bus
PIO
t
RST
t
SLOT
t
SLOT
t
SLOT
latch PIO
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