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参数资料
| 型号： | DS2450S+T&R |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 2/25页 |
| 文件大小： | 0K |
| 描述： | IC CONVERTER A/D QUAD 1-W 8-SOIC |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 产品变化通告： | Product Discontinuation 27/Jul/12 |
| 标准包装： | 2,000 |
| 位数： | 16 |
| 采样率（每秒）： | 1k |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 2.5mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.209"，5.30mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 4 个单端，单极 |
DS2450
10 of 24
CONVERT [3CH]
The Convert command is used to initiate the analog to digital conversion for one or more channels at the
resolution specified in memory page 1, control/status data. The conversion takes between 60 and 80 μs
per bit plus an offset time of maximum 160 μs every time the convert command is issued. For four
channels with 12-bit resolution each, as an example, the convert command will not take more than
4x12x80 μs plus 160 μs offset, which totals 4 ms. If the DS2450 gets its power through the VCC pin, the
bus master may communicate with other devices on the 1-Wire bus while the DS2450 is busy with A/D
conversions. If the device is powered entirely from the 1-Wire bus, the bus master must instead provide a
strong pullup to 5V for the estimated duration of the conversion in order to provide sufficient energy.
The conversion is controlled by the input select mask (Figure 7a) and the read-out control byte (Figure
7b). In the input select mask the bus master specifies which channels participate in the conversion. A
channel is selected if the bit associated to the channel is set to 1. If more than one channel is selected, the
conversion takes place one channel after another in the sequence A, B, C, D, skipping those channels that
are not selected. The bus master can read the result of a channel’s conversion before the conversion of all
the remaining selected channels is completed. In order to distinguish between the previous result and the
new value the bus master uses the read-out control byte. This byte allows presetting the conversion read-
out registers for each selected channel to all 1’s or all 0’s. If the expected result is close to 0 then one
should preset to all 1’s or to all 0’s if the conversion result will likely be a high number. In applications
where the bus master can wait until all selected channels are converted before reading, a preset of the
read-out registers is not necessary. Note that for a channel not selected in the input select mask, the
channel’s read-out control setting has no effect. If a channel constantly yields conversion results close to
0 the channel’s output transistor may be conducting. See section Device Registers for details.
INPUT SELECT MASK (CONVERSION COMMAND)
Figure 7a
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
“don’t care”
D
C
B
A
READ-OUT CONTROL (CONVERSION COMMAND)
Figure 7b
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Set D
Clear D
Set C
Clear C
Set B
Clear B
Set A
Clear A
Set
Clear
Explanation
0
no preset, leave as is
0
1
preset to all 0’s
1
0
preset to all 1’s
1
(illegal code)
Following the Convert command byte the bus master transmits the input select mask and the read-out
control byte. Now the bus master reads the CRC16 of the command byte, select mask and control byte.
The conversion will start no earlier than 10 μs after the most significant bit of the CRC is received by the
bus master.
With a parasitic power supply the bus master must activate the strong pullup within this 10 μs window for
a duration that is estimated as explained above. After that, the data line returns to an idle high state and
communication on the bus can resume. The bus master would normally send a reset pulse to exit the
Convert command. Read data time slots generated after the strong pullup has ended but before issuing a
reset pulse should result in all 1’s if the conversion time was calculated correctly.
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