参数资料
型号: DS26503L
英文描述: T1/E1/J1 BITS Element
中文描述: T1/E1/J1收发BITS的元素
文件页数: 63/123页
文件大小: 995K
代理商: DS26503L
DS26503 T1/E1/J1 BITS Element
63 of 123
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
HW
Mode
Note:
Also used to insert Fs framing pattern in D4 framing mode.
The transmit FDL register (TFDL) contains the FDL information that is to be inserted on a byte-basis into the outgoing T1 data
stream. The LSB is transmitted first.
Bit 0/Transmit FDL Bit 0 (TFDL0).
LSB of the transmit
FDL code.
Bit 1/Transmit FDL Bit 1 (TFDL1).
Bit 2/Transmit FDL Bit 2 (TFDL2).
Bit 3/Transmit FDL Bit 3 (TFDL3).
Bit 4/Transmit FDL Bit 4 (TFDL4).
Bit 5/Transmit FDL Bit 5 (TFDL5).
Bit 6/Transmit FDL Bit 6 (TFDL6).
Bit 7/Transmit FDL Bit 7 (TFDL7).
MSB of the transmit
FDL code.
TFDL
Transmit FDL Register
51h
7
6
5
4
3
2
1
0
TFDL7
0
TFDL6
0
TFDL5
0
TFDL4
0
TFDL3
0
TFDL2
0
TFDL1
0
TFDL0
0
0
0
0
1
1
1
0
0
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